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參數(shù)資料
| 型號： | KSZ8001SL TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 5/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | TXRX 10/100 LINKMD 3.3V 48-SSOP |
| 標準包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | MII，RMII，SMII |
| 電源電壓： | 1.8V, 3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 48-SSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | 576-1620-ND - BOARD EVALUATION FOR KSZ8001L |
| 其它名稱： | KSZ8001SLTR KSZ8001SLTR-ND |
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Micrel
KSZ8001
June 2009
Revision 1.04
13
SQE and Jabber Function (10BASE-T only)
In 10BASE-T operation, a short pulse will be put out on the COL pin after each packet is transmitted. This is required as a test of the
10BASE-T transmit/receive path and is called SQE test. The 10BASE-T transmitter will be disabled and COL will go high if TXEN is
High for more than 20 ms (Jabbering). If TXEN then goes low for more than 250 ms, the 10BASE-T transmitter will be re-enabled
and COL will go Low.
Auto-Negotiation
The KSZ8001 performs auto-negotiation by hardware strapping option (pin 29) or software (Register 0.12). It will automatically
choose its mode of operation by advertising its abilities and comparing them with those received from its link partner whenever auto-
negotiation is enabled. It can also be configured to advertise 100BASE-TX or 10BASE-T in either full- or half-duplex mode. Auto-
negotiation is disabled in FX mode.
During auto-negotiation, the contents of Register 4, coded in Fast Link Pulse (FLP), will be sent to its link partner under the
conditions of power-on, link-loss or re-start. At the same time, the KSZ8001 will monitor incoming data to determine its mode of
operation. Parallel detection circuit will be enabled as soon as either 10BASE-T NLP (Normal Link Pulse) or 100BASE-TX idle is
detected. The operation mode is configured based on the following priority:
Priority 1: 100BASE-TX, full-duplex
Priority 2: 100BASE-TX, half-duplex
Priority 3: 10BASE-T, full-duplex
Priority 4: 10BASE-T, half-duplex
When the KSZ8001 receives a burst of FLP from its link partner with 3 identical link code words (ignoring acknowledge bit), it will
store these code words in Register 5 and wait for the next 3 identical code words. Once the KSZ8001 detects the second code
words, it then configures itself according to the above-mentioned priority. In addition, the KSZ8001 also checks for 100BASE-TX idle
or 10BASE-T NLP symbols. If either is detected, the KSZ8001 automatically configures to match the detected operating speed.
MII Management Interface
The KSZ8001 supports the IEEE 802.3 MII Management Interface, also known as the Management Data Input / Output (MDIO)
Interface. This interface allows upper-layer devices to monitor and control the state of the KSZ8001. The MDIO interface consists of
the following:
A physical connection including a data line (MDIO), a clock line (MDC) and an optional interrupt line (INTRPT)
A specific protocol that runs across the above-mentioned physical connection and it also allows one controller to
communicate with multiple KSZ8001 devices. Each KSZ8001 is assigned an MII address between 0 and 31 by the PHYAD
inputs.
An internal addressable set of fourteen 16-bit MDIO registers. Register [0:6] are required and their functions are specified
by the IEEE 802.3 specifications. Additional registers are provided for expanded functionality.
The INTPRT pin functions as a management data interrupt in the MII. An active Low or High in this pin indicates a status change on
the KSZ8001 based upon 1fh.9 level control. Register bits at 1bh[15:8] are the interrupt enable bits. Register bits at 1bh[7:0] are the
interrupt condition bits. This interrupt is cleared by reading Register 1bh.
MII Data Interface
The data interface consists of separate channels for transmitting data from a 10/100 802.3 compliant Media Access Controller (MAC)
to the KSZ8001, and for receiving data from the line. Normal data transmission is implemented in 4B Nibble Mode (4-bit wide
nibbles).
Transmit Clock (TXC)
: The transmit clock is normally generated by the KSZ8001 from an external 25MHz reference source at the
X1 input. The transmit data and control signals must always be synchronized to the TXC by the MAC. The KSZ8001 normally
samples these signals on the rising edge of the TXC.
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相關代理商/技術參數(shù) |
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| KSZ801S | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:1.8C, 3.3V 10/100BASE-T/TX/FX Physical Layer Transceiver |
| KSZ8021RNL | 功能描述:TXRX PHY 100BASE TX 3.3V 24QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:1,140 系列:AU 類型:收發(fā)器 驅動器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND |
| KSZ8021RNL TR | 功能描述:以太網(wǎng) IC 3.3V, 100Base-FX Physical Layer Transceiver with RMII support (24-QFN) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8021RNL-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 3.3V, 100Base-FX Physical Layer Transceiver w/ RMII Support - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8021RNL-TR | 功能描述:1/1 Transceiver Full RMII 24-QFN (4x4) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:RMII 驅動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商器件封裝:24-QFN（4x4） 標準包裝:1 |
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