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參數(shù)資料
| 型號： | KS88P0716 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8-Bit CMOS Microcontroller(8位 CMOS 微控制器) |
| 中文描述： | 8位CMOS微控制器（8位的CMOS微控制器） |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 40K |
| 代理商： | KS88P0716 |
KS88C0716/P0716 (PeliminarySpec)
PRODUCT OVERIEW
1-7
Table 1-2. KS88C0716 Pin Descriptions(64-SDIP)
Pin
Name
Pin
Type
I/O
Pin
Description
Circuit
Number
E
SDIP Pin
Number
1–7, 64
Share
Pins
A8–A15
P0.0–P0.7
I/O port with nibble-programmable pins;
Input or push-pull, open-drain output and
software assignable pull-ups; also
configurable as external interface address
lines A8-A15.
Same general characteristics as port 0; also
configurable as external interface
address/data lines AD0–AD7.
I/O port with bit-programmable pins; Input
or push-pull output. Lower nibble pins 0–3
are configurable for external interface
signals; upper nibble pins 4–7 are bit-
programmable for external interrupts INT0–
INT3. P2.4 can also be used for external
WAIT
input.
I/O port with bit-programmable pins; Input
or push-pull output. Alternate functions
include software-selectable UART transmit
and receive on pins 3.7 and 3.6, timer B
and timer A outputs at pins 3.5 and 3.4, and
timer D and C clock inputs at pins 3.1 and
3.0.
I/O port with bit-programmable pins; Input
or push-pull output; software-assignable
pull-ups. Alternate functions include
external interrupt inputs INT4-INT11 (with
interrupt enable and pending control) and
timer C and D gate input at P4.0 and P4.1.
I/O port with nibble-programmable pins;
Input or push-pull, open-drain output;
software-assignable pull-ups.
Output port with nibble-programmable pins;
push-pull, open-drain output; software-
assignable pull-ups.
Bi-directional serial data input pin
Serial data output pin
Timer A and B output pins
Timer C and D external clock input pins
External interrupts. I/O pin 2.4 (share pin
with INT0) is also configurable as a
WAIT
signal input pin for the external interface.
P1.0–P1.7
I/O
E
56–63
AD0–AD7
P2.0–P2.3
P2.4–P2.7
I/O
D-1 (lower
nibble);
D-1 (upper
nibble; with
noise filter)
40–47
AS, DS,
DM,
R/
W
INT0–INT3,
WAIT
P3.0–P3.7
I/O
D-1
24– 31
TCCK,
TDCK, TA,
TB, TxD,
RxD
P4.0–P4.7
I/O
D
(with noise
filter)
8–15
INT4–
INT11,
TCG, TDG
P5.0–P5.7
I/O
E
21, 22,
50–55
–
P6.0–P6.7
O
E-8
32–39
–
RxD
TxD
TA, TB
TCCK, TDCK
INT0–INT3
I/O
I/O
I/O
I/O
I/O
–
–
4
24
25
P3.7
P3.6
27, 26
30, 31
40–43
P3.4, P3.5
P3.0, P3.1
P2.4–P2.7
D-1
D-1
(with noise
filter)
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