參數(shù)資料
型號： KS88C8432
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Ceramic Disc Capacitor; Capacitance:3300pF; Capacitance Tolerance:+/- 20%; Series:VY2; Voltage Rating:330VDC; Capacitor Dielectric Material:Ceramic; Lead Pitch:10mm; Termination:Radial Leaded; Dielectric Characteristic:Y5U RoHS Compliant: Yes
中文描述： SAM87家庭的8位單芯片CMOS微控制器提供了快速，高效的CPU
文件頁數(shù)： 6/25頁
文件大?。?/td> 168K
代理商： KS88C8432
KS88C8424/C8432/P8432
PRODUCT OVERVIEW
1-5
PIN DESCRIPTIONS
Table 1-1. KS88C8424/C8432/P8432 Pin Descriptions
Pin Name
Pin
Type
I/O
Pin Description
Circuit
Type
2
Pin
Numbers
39–42
Share
Pins
(See pin
description)
P0.0–P0.3
General I/O port (4-bit), configurable for
digital input or n-channel open-drain, push-
pull output.
Pins can withstand up to 5 V loads.
General I/O port (2-bit), configurable for
digital input or push-pull output.
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P0.6–P0.7 can withstand up to 5 V loads.
Multiplexed for alternative use as external
inputs, ADC2–ADC3.
P0.4–P0.5
3
38, 35
P0.6–P0.7
6
11–12
ADC2–ADC3
P1.0–P1.3
I/O
General I/O port (4-bit), configurable for
digital input or n-channel open-drain output.
P1.0–P1.3 can withstand up to 6 V loads.
Multiplexed for alternative use as external
interrupt inputs, INT0–INT3.
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P1.4–P1.5 can withstand up to 6 V loads.
High current port(10mA)
General I/O port (2-bit), configurable for
digital input or push-pull output.
Each pin has an alternative function.
P1.7: T0CK (Timer 0 clock input)
7
14–17
INT0–INT3
P1.4–P1.5
5
18–19
P1.6–P1.7
3
20, 8
T0CK
P2.0–P2.7
I/O
General I/O port (8-bit). Input/output mode
or n-channel open-drain, push-pull output
mode are software configurable. Pins can
withstand up to 5 V loads.
Each pin has an alternative function.
P2.0: PWM5 (8-bit PWM output)
P2.1: PWM1 (14-bit PWM output)
P2.2: PWM2 (8-bit PWM output)
P2.3: PWM3 (8-bit PWM output)
P2.4: PWM4 (8-bit PWM output)
P2.5: PWM0 (14-bit PWM output)
P2.6: T0 (Timer 0 PWM and interval output)
P2.7: OSDHT (Halftone signal output)
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P3.0–P3.1 can withstand up to 5 V loads.
Multiplexed for alternative use as external
inputs ADC0–ADC1.
2
1–7, 21
PWM0–
PWM5
T0, OSDHT
P3.0–P3.1
I/O
6
9–10
ADC0–ADC1
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