參數(shù)資料
型號(hào)： KS8701
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： FLEXTM Roaming Decoder II
中文描述： FLEXTM漫游解碼器二
文件頁(yè)數(shù)： 12/73頁(yè)
文件大?。?/td> 434K
代理商： KS8701
KS8701
SPI Packets
FLEX
TM
Roaming Decoder II
11
SPI PACKETS
All data communicated between the KS8701 and the host MCU is transmitted on the SPI in 32-bit packets.
Each packet consists of an 8-bit ID followed by 24 bits of information. The KS8701 uses the SPI bus in full duplex
mode. In other words, whenever a packet communication occurs, the data in both directions is valid packet data.
The SPI interface consists of a
READY
pin and four SPI pins (
SS, SCK, MOSI
, and
MISO
). The
SS
is used as
a chip select for the KS8701. The
SCK
is a clock supplied by the host MCU. The data from the host is transmitted
on the
MOSI
(Master-Out-Slave-In) line. The data from the KS8701 is transmitted on the
MISO
(Master-In-Slave-
Out) line.
Timing requirements for SPI communication are specified in
“
SPI Timing
”
on page 69.
PACKET COMMUNICATION INITIATED BY THE HOST
Refer to figure 6 on page 11. When the host sends a packet to the KS8701, it performs the following steps:
1.
2.
3.
4.
5.
Select the KS8701 by driving the
SS
pin low.
Wait for the KS8701 to drive the
READY
pin low.
Send the 32-bit packet.
De-select the KS8701 by driving the
SS
pin high.
Repeat steps 1 through 4 for each additional packet.
Figure 6: Typical Multiple Packet Communications Initiated by the Host
When the host sends a packet, it will also receive a valid packet from the KS8701. If the KS8701 is enabled
(see
“
Checksum Packet
”
on page 16 for a definition of enabled) and has no other packets waiting to be sent, the
KS8701 will send a status packet.
The host must transition the
SS
pin from high to low to begin each 32-bit packet. The KS8701 must
see a negative transition on the
SS
pin in order for the host to initiate each packet communication.
%
$
#
"
D0
D1
D31
D31
D31
D1 D0
D0
D1
D0
D1
D0
D1
D31
D31
D0
D1
D31
SS
MOSI
MISO
High impedance state
SCK
READY
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