參數(shù)資料
型號: KS0717
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Driver & Controller for STN LCD(STN LCD驅(qū)動器和控制器)
中文描述: 驅(qū)動程序
文件頁數(shù): 9/57頁
文件大?。?/td> 288K
代理商: KS0717
55COM/100SEG DRIVER & CONTROLLER FOR STN LCD
KS0717
9
Preliminary
Microprocessor Interface
RESETB
PS
I
I
Reset input pin. When RESETB is low, initialization is executed.
Parallel/Serial data input select input
NOTE:
In serial mode, it is impossible to read data from the on-chip RAM. DB0 to
DB5 is high impedance and E_RD and RW_WR must be fixed on high or low.
Microprocessor Interface select input in parallel mode
C68 =
H
: 6800-series MPU interface
C68 =
L
: 8080-series MPU interface
Chip select inputs
C68
I
CS1B/CS2
I
Data input / output is enabled only when CS1B is low and CS2 is high. When chip
select is non-active,DB0 to DB7 will be high impedance.
Register select input
RS =
H
: The data on DB0 to DB7 is display data.
RS =
L
: The data on DB0 to DB7 is control data.
When interfacing to a 6800-series MPU, Read / Write is enabled.
RW_WR =
H
: Read
RW_WR =
L
: Write
RS
I
RW_WR
I
When interfacing to an 8080-series MPU, RW_WR is enabled at low.
When interfacing to a 6800-series MPU: active high: This is used as an enabled clock
input pin of the 6800-series MPU.
E_RD
I
When interfacing to an 8080-series MPU: active low: This input connects the RD
signal of the 8080-series MPU. While this signal is Low, KS0717 data bus output is
enabled.
8-bit bidirectional data bus. It is connected to the standard 8-bit microprocessor data
bus. When the serial interface selected (PS =
L
):
DB0 to DB5: High impedance
DB6: Serial input clock (SCLK)
DB7: Serial input data (SID)
DB0 to DB7
I/O
When chip select is not active, DB0 to DB7 will be high impedance.
Table 2. Pin Description (Continued)
Name
I/O
Description
PS
Operating
Mode
Parallel
Chip
Select
CS1B,
CS2
CS1B,
CS2
Data/
Instruction
RS
Data
Input/Output
DB0 to DB7
Read/
Write
E_RD,
RW_WR
Write
Only
Serial
Clock
H
L
Serial
RS
DB7
(SID)
DB6
(SCLK)
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