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參數(shù)資料
| 型號(hào)： | KS0078 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD |
| 中文描述： | 34COM/120SEG驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 16/71頁(yè) |
| 文件大?。?/td> | 563K |
| 代理商： | KS0078 |
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KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Timing Generation Circuit
Timing generation circuit generates clock signals for the internal operations.
Address Counter (AC)
Address Counter(AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR.
After writing into (reading from) DDRAM/CGRAM/SEGRAM, AC is automatically increased
(decreased) by 1. When RS = "Low" and R/W = "High", AC can be read through DB0~DB6
Cursor/Blink Control Circuit
It controls cursor/blink ON/OFF and black/white inversion at cursor position.
LCD Driver Circuit
LCD Driver circuit has 34 common and 120 segment signals for LCD driving.
Data from SEGRAM/CGRAM/CGROM is transferred to 120-bit segment latch serially, which is stored to 120-bit shift latch.
When each common is selected by 34-bit common register, segment data also output through segment driver from 100-bit segment
latch.
In 1-line display mode, COM0 ~ COM17 have 1/17 duty, and in 2-line or 4-line mode, COM0 ~ COM33 have 1/33 duty
ratio.
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