參數(shù)資料
型號(hào)： KMPC885ZP80
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 7/87頁(yè)
文件大?。?/td> 0K
描述： IC MPU POWERQUICC 80MHZ 357PBGA
標(biāo)準(zhǔn)包裝： 2
系列： MPC8xx
處理器類型： 32-位 MPC8xx PowerQUICC
速度： 80MHz
電壓： 3.3V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應(yīng)商設(shè)備封裝： 357-PBGA（25x25）
包裝： 托盤
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Freescale Semiconductor
15
Power Supply and Power Sequencing
7.6
References
Semiconductor Equipment and Materials International(415) 964-5111
805 East Middlefield Rd
Mountain View, CA 94043
MIL-SPEC and EIA/JESD (JEDEC) specifications800-854-7179 or
(Available from Global Engineering Documents)303-397-7956
JEDEC Specifications
http://www.jedec.org
1. C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an
Automotive Engine Controller Module,” Proceedings of SemiTherm, San Diego, 1998, pp. 47–54.
2. 2. B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal
Resistance and Its Application in Thermal Modeling,” Proceedings of SemiTherm, San Diego,
1999, pp. 212–220.
8
Power Supply and Power Sequencing
This section provides design considerations for the MPC885/MPC880 power supply. The
MPC885/MPC880 has a core voltage (VDDL) and PLL voltage (VDDSYN), which both operate at a lower
voltage than the I/O voltage VDDH. The I/O section of the MPC885/MPC880 is supplied with 3.3 V across
VDDH and VSS (GND).
The signals PA[0:15], PB[14:31], PC[4:15], PD[3:15], TDI, TDO, TCK, TRST_B, TMS, MII_TXEN, and
MII_MDIO are 5 V tolerant. All inputs cannot be more than 2.5 V greater than VDDH. In addition, 5-V
tolerant pins cannot exceed 5.5 V and remaining input pins cannot exceed 3.465 V. This restriction applies
to power up/down and normal operation.
One consequence of multiple power supplies is that when power is initially applied the voltage rails ramp
up at different rates. The rates depend on the nature of the power supply, the type of load on each power
supply, and the manner in which different voltages are derived. The following restrictions apply:
VDDL must not exceed VDDH during power up and power down.
VDDL must not exceed 1.9 V, and VDDH must not exceed 3.465 V.
These cautions are necessary for the long-term reliability of the part. If they are violated, the electrostatic
discharge (ESD) protection diodes are forward-biased, and excessive current can flow through these
diodes. If the system power supply design does not control the voltage sequencing, the circuit shown
Figure 5 can be added to meet these requirements. The MUR420 Schottky diodes control the maximum
potential difference between the external bus and core power supplies on power up, and the 1N5820 diodes
regulate the maximum potential difference on power down.
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