參數(shù)資料
型號: KMPC880ZP80
廠商: Freescale Semiconductor
文件頁數(shù): 31/87頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC 80MHZ 357PBGA
標準包裝: 2
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 80MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應商設備封裝: 357-PBGA(25x25)
包裝: 托盤
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Freescale Semiconductor
37
Bus Signal Timing
Table 11 shows the PCMCIA timing for the MPC885/MPC880.
Table 11. PCMCIA Timing
Num
Characteristic
33 MHz
40 MHz
66 MHz
80 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
P44
A(0:31), REG valid to PCMCIA strobe
asserted1 (MIN = 0.75
× B1 – 2.00)
1 PSST = 1. Otherwise add PSST times cycle time.
PSHT = 0. Otherwise add PSHT times cycle time.
These synchronous timings define when the WAITx signals are detected in order to freeze (or relieve) the PCMCIA current
cycle. The WAITx assertion will be effective only if it is detected 2 cycles before the PSL timer expiration. See Chapter 16,
“PCMCIA Interface,” in the
MPC885 PowerQUICC Family Reference Manual.
20.70
16.70
9.40
7.40
ns
P45
A(0:31), REG valid to ALE negation1
(MIN = 1.00
× B1 – 2.00)
28.30
23.00
13.20
10.50
ns
P46
CLKOUT to REG valid
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
3.80
11.80
3.13
11.13
ns
P47
CLKOUT to REG invalid
(MIN = 0.25 – B1 + 1.00)
8.60
7.30
4.80
4.13
ns
P48
CLKOUT to CE1, CE2 asserted
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
3.80
11.80
3.13
11.13
ns
P49
CLKOUT to CE1, CE2 negated
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
3.80
11.80
3.13
11.13
ns
P50
CLKOUT to PCOE, IORD, PCWE, IOWR
assert time (MAX = 0.00
× B1 + 11.00)
11.00
11.00
11.00
11.00
ns
P51
CLKOUT to PCOE, IORD, PCWE, IOWR
negate time (MAX = 0.00
× B1 + 11.00)
2.00
11.00
2.00
11.00
2.00
11.00
2.00
11.00
ns
P52
CLKOUT to ALE assert time
(MAX = 0.25
× B1 + 6.30)
7.60
13.80
6.30
12.50
3.80
10.00
3.13
9.40
ns
P53
CLKOUT to ALE negate time
(MAX = 0.25
× B1 + 8.00)
15.60
14.30
11.80
11.13
ns
P54
PCWE, IOWR negated to D(0:31) invalid 1
(MIN = 0.25
× B1 – 2.00)
5.60
4.30
1.80
1.13
ns
P55
WAITA and WAITB valid to CLKOUT rising
edge1 (MIN = 0.00
× B1 + 8.00)
8.00
8.00
8.00
8.00
ns
P56
CLKOUT rising edge to WAITA and WAITB
invalid1 (MIN = 0.00
× B1 + 2.00)
2.00
2.00
2.00
2.00
ns
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