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    參數(shù)資料
    型號: KMPC859DSLCVR66A
    廠商: Freescale Semiconductor
    文件頁數(shù): 12/96頁
    文件大?。?/td> 0K
    描述: IC MPU POWERQUICC 66MHZ 357PBGA
    標準包裝: 2
    系列: MPC8xx
    處理器類型: 32-位 MPC8xx PowerQUICC
    速度: 66MHz
    電壓: 1.8V
    安裝類型: 表面貼裝
    封裝/外殼: 357-BBGA
    供應商設備封裝: 357-PBGA(25x25)
    包裝: 托盤
    MPC866/MPC859 Hardware Specifications, Rev. 2
    2
    Freescale Semiconductor
    Features
    Table 1 shows the functionality supported by the members of the MPC866/859 family.
    2Features
    The following list summarizes the key MPC866/859 features:
    Embedded single-issue, 32-bit PowerPC core (implementing the PowerPC architecture) with
    thirty-two 32-bit general-purpose registers (GPRs)
    — The core performs branch prediction with conditional prefetch, without conditional execution
    — 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1)
    – 16-Kbyte instruction cache (MPC866P and MPC859P) is four-way, set-associative with 256 sets;
    4-Kbyte instruction cache (MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative
    with 128 sets.
    – 8-Kbyte data cache (MPC866P and MPC859P) is two-way, set-associative with 256 sets; 4-Kbyte
    data cache(MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative with 128 sets.
    – Cache coherency for both instruction and data caches is maintained on 128-bit (4-word) cache
    blocks
    – Caches are physically addressed, implement a least recently used (LRU) replacement algorithm, and
    are lockable on a cache block basis.
    — MMUs with 32-entry TLB, fully associative instruction and data TLBs
    — MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address spaces
    and 16 protection groups.
    — Advanced on-chip-emulation debug mode
    The MPC866/859 provides enhanced ATM functionality over that of the MPC860SAR. The MPC866/859
    adds major new features available in 'enhanced SAR' (ESAR) mode, including the following:
    — Improved operation, administration, and maintenance (OAM) support
    — OAM performance monitoring (PM) support
    — Multiple APC priority levels available to support a range of traffic pace requirements
    Table 1. MPC866 Family Functionality
    Part
    Cache
    Ethernet
    SCC
    SMC
    Instruction
    Data
    10T
    10/100
    MPC866P
    16 Kbytes
    8 Kbytes
    Up to 4
    1
    4
    2
    MPC866T
    4 Kbytes
    Up to 4
    1
    4
    2
    MPC859P
    16 Kbytes
    8 Kbytes
    1112
    MPC859T
    4 Kbytes
    1112
    MPC859DSL
    4 Kbytes
    1
    1 1
    1
    On the MPC859DSL, the SCC (SCC1) is for ethernet only. Also, the MPC859DSL does not support the Time Slot
    Assigner (TSA).
    1 2
    2
    On the MPC859DSL, the SMC (SMC1) is for UART only.
    MPC852T 3
    3
    For more details on the MPC852T, please refer to the
    MPC852T Hardware Specifications.
    4 KBytes
    4 Kbytes
    2121
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