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| 型號： | KMPC8560VT667LC |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC III 783-FCPBGA |
| 標(biāo)準(zhǔn)包裝： | 2 |
| 系列： | MPC85xx |
| 處理器類型： | 32-位 MPC85xx PowerQUICC III |
| 速度： | 667MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 784-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 783-FCPBGA（29x29） |
| 包裝： | 托盤 |
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MPC8560 PowerQUICC III
MOTOROLA
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Processing Across the On-Chip Fabric
Because FIFOs are typically smaller than the incoming PDU, steps 1–3 may be repeated several times to
store the entire packet. There may also be times when the incoming PDU is larger than the buffer length
defined in the RxBD. In such cases, steps 4–5 may be repeated, and several BDs may be opened and closed
to store the entire PDU.
When the transmit portion of the communication channel is enabled, the CPM starts with the first BD in the
TxBD table (pointed to by a register in the channel’s parameter RAM table), polling the ready R bit of the
BD to verify that the buffer is ready for transmission.
7. When the BD is marked as ready, the data is moved from the main memory buffer to a temporary
storage location through DMA transactions.
8. The CPM moves data from the temporary memory location to the Tx FIFO.
9. Data is taken from the Tx FIFO in its parallel form and serialized.
10. When the Tx FIFO is emptied to a set threshold, the communication channel signals the CPM for
more data in order to maintain throughput.
11. The serialized data is encoded and transmitted on the I/O port.
Again, because the buffer pointed to by the Tx BD is typically larger than the Tx FIFO, the communication
channel may make several iterations of steps 7–10 to load and transmit the entire PDU.
Figure 3. Data Processing in the CPM
4.2
Processing Across the On-Chip Fabric
When processing across the on-chip fabric, the ATMUs at each fabric port are used to determine the flow
of data across the MPC8560. The ATMUs at each fabric port are responsible for generating a fabric port
destination ID as well as a new local device address. The port ID and local address are based on the
CPM
Decoder
Shifter
Rx FIFO
Temp Storage
Buffer Memory
Temp Storage
Tx FIFO
Shifter
Encoder
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CPU
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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