參數(shù)資料
型號: KMPC8347VVALFB
廠商: Freescale Semiconductor
文件頁數(shù): 12/99頁
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 672-TBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 667MHz
電壓: 1.3V
安裝類型: 表面貼裝
封裝/外殼: 672-LBGA
供應(yīng)商設(shè)備封裝: 672-TBGA(35x35)
包裝: 托盤
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
2
Freescale Semiconductor
Overview
NOTE
The information in this document is accurate for revision 3.x silicon and
later (in other words, for orderable part numbers ending in A or B). For
information on revision 1.1 silicon and earlier versions, see the MPC8347E
PowerQUICC II Pro Integrated Host Processor Hardware Specifications.
silicon revision level determination.
1
Overview
This section provides a high-level overview of the device features. Figure 1 shows the major functional
units within the MPC8347EA.
Figure 1. MPC8347EA Block Diagram
Major features of the device are as follows:
Embedded PowerPC e300 processor core; operates at up to 667 MHz
— High-performance, superscalar processor core
— Floating-point, integer, load/store, system register, and branch processing units
— 32-Kbyte instruction cache, 32-Kbyte data cache
— Lockable portion of L1 cache
— Dynamic power management
— Software-compatible with the other Freescale processor families that implement Power
Architecture technology
Double data rate, DDR1/DDR2 SDRAM memory controller
— Programmable timing supporting DDR1 and DDR2 SDRAM
— 32- or 64-bit data interface, up to 400 MHz data rate for TBGA, 266 MHz for PBGA
DUART
Dual I2C
Timers
GPIO
Security
Interrupt
Controller
Dual
Role
High-Speed
Local Bus
DDR
SDRAM
Controller
Host
32KB
D-Cache
e300 Core
32KB
I-Cache
USB 2.0
10/100/1000
SEQ
PCI
DMA
Ethernet
10/100/1000
Ethernet
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