參數(shù)資料
型號: KMPC8343ZQAGDB
廠商: Freescale Semiconductor
文件頁數(shù): 56/80頁
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 620-PBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
6
Freescale Semiconductor
Electrical Characteristics
— Misaligned transfer capability
— Data chaining and direct mode
— Interrupt on completed segment and chain
DUART
— Two 4-wire interfaces (RxD, TxD, RTS, CTS)
— Programming model compatible with the original 16450 UART and the PC16550D
Serial peripheral interface (SPI) for master or slave
General-purpose parallel I/O (GPIO)
— 39 parallel I/O pins multiplexed on various chip interfaces
System timers
— Periodic interrupt timer
— Real-time clock
— Software watchdog timer
— Eight general-purpose timers
Designed to comply with IEEE Std. 1149.1, JTAG boundary scan
Integrated PCI bus and SDRAM clock generation
2
Electrical Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8343EA. The device is currently targeted to these specifications. Some of these specifications are
independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer
design specifications.
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
Table 1 provides the absolute maximum ratings.
Table 1. Absolute Maximum Ratings1
Parameter
Symbol
Max Value
Unit
Notes
Core supply voltage
VDD
–0.3 to 1.32
V
PLL supply voltage
AVDD
–0.3 to 1.32
V
DDR and DDR2 DRAM I/O voltage
GVDD
–0.3 to 2.75
–0.3 to 1.98
V—
Three-speed Ethernet I/O, MII management voltage
LVDD
–0.3 to 3.63
V
PCI, local bus, DUART, system control and power management, I2C,
and JTAG I/O voltage
OVDD
–0.3 to 3.63
V
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