參數(shù)資料
型號: KM736V689
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 64Kx36-Bit Synchronous Pipelined Burst SRAM(64Kx36位同步流水線脈沖 靜態(tài) RAM)
中文描述: 64Kx36位同步流水線突發(fā)靜態(tài)存儲器(64Kx36位同步流水線脈沖靜態(tài)內(nèi)存)
文件頁數(shù): 7/15頁
文件大小: 318K
代理商: KM736V689
PRELIMINARY
KM736V689/L
64Kx36 Synchronous SRAM
- 7 -
Rev 1.0
April 1997
TEST CONDITIONS
(T
A
=0 to 70
°
C, V
DD
=3.3V-5%/+10%, unless otherwise specified)
Parameter
Value
Input Pulse Level
0 to 3V
Input Rise and Fall Time(Measured at 0.3V and 2.7V)
2ns
1.5V
See Fig. 1
Input and Output Timing Reference Levels
Output Load
Output Load(B),(3.3V I/O)
(for t
LZC
, t
LZOE
, t
HZOE
& t
HZC
)
Dout
353
5pF*
+3.3V
319
Fig. 1
* Including Scope and Jig Capacitance
Output Load(A)
Dout
Z0=50
VL=1.5V
* Capacitive Load consists of all components of
the test environment.
30pF*
RL=50
DC ELECTRICAL CHARACTERISTICS
(T
A
=0 to 70
°
C, V
DD
=3.3V
±
5%)
* V
IL
(Min)=-3.0(Pulse Width
20ns)
** In Case of I/O Pins, the Max. V
IH
=V
DDQ
+0.5V
Parameter
Symbol
Test Conditions
Min
Max
Unit
Input Leakage Current(except ZZ)
I
IL
V
DD
=V
SS
to V
DD
; V
IN
=V
SS
to V
DD
-2
+2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled, V
OUT
=V
SS
to V
DDQ
-2
+2
Operating Current
I
CC
Device Selected, I
OUT
=0mA, ZZ
V
IL
,
All Inputs=V
IL
or V
IH
Cycle Time
t
CYC
min
-7
-
395
mA
-8
-
360
-10
-
320
-11
-
320
Standby Current
I
SB
Device deselected, I
OUT
= 0mA,
ZZ
V
IL
, f = Max,
All Inputs
0.2V or
V
DD
-0.2V
-7
-
100
mA
-8
-
90
-10
-
80
-11
-
80
I
SB1
Device deselected, I
OUT
= 0mA,
ZZ
0.2V, f = 0,
All Inputs=fixed (V
DD
-0.2V or 0.2V)
-
10
mA
L-Ver
-
5.0
mA
I
SB2
Device deselected, I
OUT
=0mA,
ZZ
V
DD
-0.2V, f = Max,
All Inputs
V
IL
or
V
IH
-
10
mA
L-Ver
-
1.0
mA
Output Low Voltage
V
OL
I
OL
= 8.0mA
-
0.4
V
Output High Voltage
V
OH
I
OH
= -4.0mA
2.4
-
V
Input Low Voltage
V
IL
-0.5*
0.8
V
Input High Voltage
V
IH
2.0
5.5**
V
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