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參數(shù)資料
| 型號： | KM681000BLE |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128K x8 bit Low Power CMOS Static RAM |
| 中文描述： | 128K的x8位低功耗CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 192K |
| 代理商： | KM681000BLE |
PRELIMINARY
CMOS SRAM
Revision 0.3
April 1996
KM681000B Family
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE (1)
(Address Controlled)
(CS
1
=OE=V
IL
, CS
2
= WE= V
IH
)
TIMING WAVEFORM OF READ CYCLE
(WE=V
IH
)
Data Valid
High-Z
CS
1
Address
CS
2
OE
Data ou
t
NOTES
(READ CYCLE)
1.
t
HZ and
t
OHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature and voltage condition,
t
HZ(max.) is less than
t
LZ(min.) both for a given device and from device to device.
t
RC
t
OH
t
OH
t
AA
t
OLZ
t
LZ
t
OHZ
t
HZ(1,2)
t
CO1
t
AA
t
RC
t
CO2
t
OE
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相關(guān)代理商/技術(shù)參數(shù) |
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| KM681000BLE-L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x8 bit Low Power CMOS Static RAM |
| KM681000BLG-5 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x8 bit Low Power CMOS Static RAM |
| KM681000BLG-5L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x8 bit Low Power CMOS Static RAM |
| KM681000BLG-7 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x8 bit Low Power CMOS Static RAM |
| KM681000BLG-7L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x8 bit Low Power CMOS Static RAM |
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