參數(shù)資料
型號: KM62U256CLG-8L
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 32Kx8 bit Low Power AND Low Vcc CMOS Static RAM
中文描述: 32Kx8位低功耗和低成本嚇的CMOS靜態(tài)RAM
文件頁數(shù): 7/12頁
文件大?。?/td> 90K
代理商: KM62U256CLG-8L
ELECTRONICS
KM62V256C, KM62U256C Family
CMOS SRAM
Revision 04
April 1996
-
7
-
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE (1)
(Address Controlled)
(/CS=/OE=Vil, /WE=Vih)
Address
Data Out
t
RC
Previous Data Valid
Data Valid
t
AA
t
OH
TIMING WAVEFORM OF READ CYCLE
(/WE= V
IH
)
Notes (READ CYCLE)
1. t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced
to output voltage levels.
2. At any given temperature and voltage condition, t
HZ
(max.) is less than t
LZ
(min.) both for a given device and from
device to device.
t
RC
t
AA
t
CO
t
OE
t
OLZ(4)
t
OH
t
LZ
t
HZ
t
OHZ
Address
/CS
/OE
Data out
Data Valid
High - Z
相關(guān)PDF資料
PDF描述
KM62U256C 32K x 8 Bit Low Power CMOS Static RAM(32K x 8位低功耗CMOS 靜態(tài)RAM)
KM62V256C 32K x 8 Bit Low Power CMOS Static RAM(32K x 8位低功耗CMOS 靜態(tài)RAM)
KM62U256D 32K x 8 Bit Low Power CMOS Static RAM(32K x 8位低功耗CMOS 靜態(tài)RAM)
KM62V256D 32K x 8 Bit Low Power CMOS Static RAM(32K x 8位低功耗CMOS 靜態(tài)RAM)
KM641001A 256K x 4 Bit(with OE)High-Speed CMOS Static RAM(256K x 4 位(帶OE)高速CMOS 靜態(tài) RAM)
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