參數(shù)資料
型號(hào)： KM29V32000TS
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 4M x 8 Bit NAND Flash Memory(4M x 8位 NAND閃速存儲(chǔ)器)
中文描述： 4米× 8位NAND閃存（4米× 8位的NAND閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 17/24頁(yè)
文件大?。?/td> 301K
代理商： KM29V32000TS
KM29V32000TS
FLASH MEMORY
17
DEVICE OPERATION
PAGE READ
Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00H to the command reg-
ister along with three address cycles. Once the command is latched, it does not need to be written for the following page read o pera-
tion. Three types of operations are available : random read, serial page read and sequential read.
The random read mode is enabled when the page address is changed. The 528 bytes of data within the selected page are trans-
ferred to the data registers in less than 10
μ
s(t
R
). The CPU can detect the completion of this data transfer(t
R
) by analyzing the output
of R/B pin. Once the data in a page is loaded into the registers, they may be read out in 50ns cycle time by sequentially pulsing RE
with CE staying low. High to low transitions of the RE clock output the data starting from the selected column address up to the last
column address(column 511 or 527 depending on state of SE pin).
After the data of last column address is clocked out, the next page is automatically selected for sequential read.
Waiting 10
μ
s again allows for reading of the selected page. The sequential read operation is terminated by bringing CE high. The
way the Read1 and Read2 commands work is like a pointer set to either the main area or the spare area. The spare area of bytes
512 to 527 may be selectively accessed by writing the Read2 command with SE pin low. Addresses A
0
to A
3
set the starting address
of the spare area while addresses A
4
to A
7
are ignored. Unless the operation is aborted, the page address is automatically incre-
mented for sequential read as in Read1 operation and spare sixteen bytes of each page may be sequentially read. The Read1 com-
mand(00H/01H) is needed to move the pointer back to the main area. Figures 3 thru 6 show typical sequence and timings for each
read operation.
Figure 3. Read1 Operation
Start Add.(3Cycle)
00H
01H
A
0
~ A
7
& A
9
~ A
21
Data Output(Sequential)
(00H Command)
1st half array 2nd half array
CE
CLE
ALE
R/B
WE
Data Field
Spare Field
(01H Command)*
1st half array 2nd half array
Data Field
Spare Field
* After data access on 2nd half array by 01H command, the start pointer is automatically moved to 1st half array (00H) at next cycle.
I/O
0
~
7
RE
t
R
相關(guān)PDF資料
PDF描述
KM29V32000T 4M x 8 Bit NAND Flash Memory(4M x 8位 NAND閃速存儲(chǔ)器)
KM29V64000R FLASH
KM29V64000TS 8M X 8 BIT NAND FLSH MEMORY
KM29V64000T 8M x 8 Bit NAND Flash Memory(8M x 8位 NAND閃速存儲(chǔ)器)
KM29V64001RS 8M X 8 BIT NAND FLASH MEMORY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KM29V64000R 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLASH
KM29V64000TS 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M X 8 BIT NAND FLSH MEMORY
KM29V64001RS 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M X 8 BIT NAND FLASH MEMORY
KM29V64001T 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M X 8 BIT NAND FLASH MEMORY
KM29V64001TS 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M X 8 BIT NAND FLASH MEMORY
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*