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參數(shù)資料
| 型號(hào)： | KK74LV573N |
| 廠商： | KODENSHI CORP. |
| 英文描述： | Octal D-type transparent latch (3-State) |
| 中文描述： | 八路D型透明鎖存器（3態(tài)） |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 249K |
| 代理商： | KK74LV573N |
TECHNICAL DATA
K K
74LV573
Octal D-type transparent latch (3-State)
The 74LV573 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT573.
The 74LV573 is an octal D-type transparent latch featuring separate D-
type inputs for each latch and 3-State outputs for bus oriented applications.
A latch enable (LE) input and an output enable (OE) input are common to
all internal latches.
The ‘573’ consists of eight D-type transparent latches with 3-State true
outputs. When LE is HIGH, data at the D n inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will change each
time its corresponding D-input changes.
When LE is LOW the latches store the information that was present at
the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE.
When OE is LOW, the contents of the eight latches are available at the
outputs. When OE is HIGH, the outputs go to the high impedance OFF-
state. Operation of the OE input does not affect the state of the latches.
The ‘573’ is functionally identical to the ‘563’ and the ‘373’, but the
‘563’ has inverted outputs and the ‘373’ has a different pin arrangement.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
Supply voltage range: 1.0 to 5.5 V
Low input current: 1.0
μ
А
; 0.1
μ
А
at
Т
= 25
°
С
High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC DIP
DW SUFFIX
SO
1
20
1
20
ORDERING INFORMATION
K K
74LV573N
K K
74LV573DW
T
A
= -40
°
to 125
°
C for all packages
Plastic DIP
SOIC
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
FUNCTION TABLE
Inputs
Output
Output
Enable
Clock
D
Q
L
H
H
L
L
L
L
L,H,
X
no
change
H
X
X
Z
H= high level
L = low level
X = don’t care
Z = high impedance
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KK74LV574 | Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV574DW | Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV574N | Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV620D | OCTAL 3-STATE INVERTING BUS TRANSCEIVER |
| KK74LV620N | OCTAL 3-STATE INVERTING BUS TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KK74LV574 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV574DW | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV574N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Octal D-type flip-flop; positive edge-trigger (3-State) |
| KK74LV620 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:OCTAL 3-STATE INVERTING BUS TRANSCEIVER |
| KK74LV620D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:OCTAL 3-STATE INVERTING BUS TRANSCEIVER |
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