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參數(shù)資料
| 型號： | KK74LS161D |
| 廠商： | KODENSHI CORP. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Synchronous 4 Bit Counters; Binary, Direct Reset |
| 中文描述： | 同步4位計數(shù)器，二進制，直接復(fù)位 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 288K |
| 代理商： | KK74LS161D |
TECHNICAL DATA
Synchronous 4 Bit Counters; Binary,
Direct Reset
KK
74LS161
This synchronous, presettable counter features an internal carry look-
ahead for application in high-speed counting designs. Synchronous
operation is provided by having all flip-flops clocked simultaneously so
that the outputs change conicident with each other when so instructed by
the count-enable inputs and internal gating.
This mode of operation eliminates the output counting spikes that are
normally associated with asynchronous (ripple clock) counters. A buffered
clock input triggers the four flip-flops on the rising (positive-going) edge
of the clock input wave form.
This counter is fully programmable; that is the outputs may be preset
to either level. As presetting is synchronous setting up a low level at the
load input disables the counter and causes the outputs to agree with the
setup data after the next clock pulse regardless of the levels of the enable
inputs.
The carry look-ahead circuitry provides for cascading counters for n-
bit synchronous applications without additional gating. Instrumental in
accomplishiing this function are two counter-enable inputs and a ripple
carry output. Both countenable inputs (ENABLE P and ENABLE T)
must be high to count, and ENABLE T is fed forward to enable the
ripple carry output. The ripple carry output thus enabled will produce a
high-level output pulse with a duration approximately equal to the high
level portion of the Q
A
output. The high-level overflow ripple carry
pulse can be enable successive cascaded stages. Transitions at the
ENPor ENT are allowed regardless of the level of the clock input.
Internal Look-Ahead for Fast Counting
Carry Output for n-Bit Cascading
Synchronous Counting
Synchronously Programmable
Load Control Line
Diode-Clamped Inputs
ORDERING INFORMATION
KK
74LS161N Plastic
KK
74LS161D SOIC
T
A
= 0
°
to 70
°
C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KK74LS161N | Synchronous 4 Bit Counters; Binary, Direct Reset |
| KK74LS164 | 8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS164D | 8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS164N | 8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS244 | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KK74LS161N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Synchronous 4 Bit Counters; Binary, Direct Reset |
| KK74LS164 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS164D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS164N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:8-Bit Serial-Input/Parallel-Output Shift Register |
| KK74LS244 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Octal 3-State Noninverting Buffer/Line Driver/Line Receiver |
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