- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄380251 > KK74ACT193 (KODENSHI CORP.) Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS PDF資料下載
參數(shù)資料
| 型號(hào)： | KK74ACT193 |
| 廠商： | KODENSHI CORP. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS |
| 中文描述： | 可預(yù)置4位二進(jìn)制加/減計(jì)數(shù)器高速硅柵CMOS |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 422K |
| 代理商： | KK74ACT193 |
TECHNICAL DATA
K K
74ACT193
Presettable 4-Bit Binary UP/DOWN Counter
High-Speed Silicon-Gate CMOS
ORDERING INFORMATION
KK
74ACT193N Plastic
KK
74ACT193D SOIC
T
A
= -40
°
to 85
°
C for all packages
PIN ASSIGNMENT
The
KK
74ACT193 is identical in pinout to the LS/ALS192,
HC/HCT192. The
KK
74ACT193 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The counter has two separate clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When the
Parallel Load input is taken low the data is loaded independently of either
clock input. This feature allows the counters to be used as devide-by-n by
modifying the count lenght with the preset inputs. In addition the counter
can also be cleared. This is accomplished by inputting a high on the
Master Reset input. All 4 internal stages are set to low independently of
either clock input.Both a Terminal Count Down (TC
D
) and Terminal
Count Up (TC
U
) Outputs are provided to enable cascading of both up and
down counting functions. The TC
D
output produces a negative going
pulse when the counter underflows and TC
U
outputs a pulse when the
counter overflows. The counter can be cascaded by connecting the TC
U
and TC
D
outputs of one device to the Count Up Clock and Count Down
Clock inputs, respectively, of the next device.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
Outputs Source/Sink 24 mA
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KK74ACT193D | Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS |
| KK74ACT193N | Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS |
| KK74ACT20 | Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
| KK74ACT20D | Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
| KK74ACT20N | Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KK74ACT193D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS |
| KK74ACT193N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS |
| KK74ACT20 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
| KK74ACT20D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
| KK74ACT20N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual 4-Input NAND Gate High-Speed Silicon-Gate CMOS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。