參數(shù)資料
型號： KIT33394DWBEVB
廠商： Freescale Semiconductor
文件頁數(shù)： 7/44頁
文件大?。?/td> 0K
描述： KIT EVAL FOR MC33394 8X PWR SPLY
標準包裝： 1
33394
15
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
3. ELECTRICAL CHARACTERISTICS (–40
°C ≤ TA ≤ +125°C; +4.0 V ≤ VBAT ≤ +26.5 V using the 33394 typical application
circuit – see Figure 1, unless otherwise noted.)
Characteristic
Symbol
Min.
Typ.
Max.
Unit
DC CHARACTERISTICS:
SPI
DO Output High Voltage, IOH = –100 A
VOH
4.2
V
DO Output Low Voltage, IOL = 1.6 mA
VOL
0.4
V
DO Tri–state Leakage Current, CS = 0
IDOLkg
–10
10
A
CS, SCLK, DI Input High Voltage
VIH
2.7
3.1
3.5
V
CS, SCLK, DI Input Low Voltage
VIL
1.7
2.1
2.5
V
CS, SCLK, DI Input Voltage Threshold Hysteresis
VIhys
0.8
1.0
1.2
V
CS, SCLK, DI Pull–Down Current,
CS, SCLK, DI = VDDH to VIL(min)
ISPI_PD
10
20
50
A
AC CHARACTERISTICS:
SPI
NOTES: MPC565 QSMCM/ SPI set for CPHA = 0 & CPOL = 0. *Assumes MPC565 SCLK rise and fall times of 30 ns, DO load = 200pF
–
Transfer Frequency
fop
dc
5.00
MHz
1
SCLK Period
tsck
200
–
ns
2
Enable Lead Time
tlead
105
–
ns
3
Enable Lag Time
tlag
50
–
ns
4
SCLK High Time*
tsckhs
70
–
ns
5
SCLK Low Time*
tsckls
70
–
ns
6
SDI Input Setup Time
tsus
16
–
ns
7
SDI Input Hold Time
ths
20
–
ns
8
SDO Access Time
ta
–
75
ns
9
SDO Disable Time
tdis
–
100
ns
10
SDO Output Valid Time
tvs
–
75
ns
11
SDO Output Hold Time
tho
0
–
ns
12
Rise Time (Design Information)
(Note 1)
tro
–
30
ns
13
Fall Time (Design Information)
(Note 1)
tfo
–
30
ns
14
CS Negated Time
(Note 1)
tcsn
500
–
ns
NOTE:
1. Guaranteed by design but not production tested.
Figure 3. SPI Timing Diagram
3
14
2
4
1
5
8
10
11
9
67
12 13
CS
SCLK
DO
DI
LSB OUT
DATA
MSB OUT
DON’T
CARE
LSB IN
DATA
MSB IN
20% and 70% of Vdd typ.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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