參數(shù)資料
型號： KIC7WZ14FK
廠商： KEC Holdings
英文描述： SILICON MONOLITHIC CMOS DIGITAL INTEGRATED CIRCUIT (SCHMITT INVERTER)
中文描述： 硅單片CMOS數(shù)字集成電路（施密特逆變器）
文件頁數(shù)： 4/4頁
文件大?。?/td> 402K
代理商： KIC7WZ14FK
2003. 3. 11
4/4
KIC7WZ14FK
Revision No : 1
Note : C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption
(I
CCD
) at no output loading and operating at 50% duty cycle. (See Figure2.) C
PD
is related to I
CCD
dynamic operating current
by the expression : I
CC(opr)
=C
PD
V
CC
f
IN
+(I
CC
static)
ELECTRICAL CHARACTERISTICS
AC Characteristics
CHARACTERISTIC
SYMBOL
TEST CONDITION
Ta=25
Ta=-40~85
UNIT
V
CC
(V)
MIN.
TYP.
MAX.
MIN.
MAX.
Propagation Delay
t
PLH
t
PHL
C
L
=15pF, R
L
=1M
1.65
1.8
2.5
2.5
1.8
1.5
1.0
1.8
1.2
-
-
7.6
6.3
4.3
3.3
2.7
4.0
3.2
2.5
11
13.1
10.9
7.4
5.0
4.1
6.0
4.9
-
-
2.5
2.5
1.8
1.5
1.0
1.8
1.2
-
-
14.5
12
8.1
5.5
4.5
6.6
5.4
-
-
ns
2.5
3.3
5.0
3.3
5.0
0.2
0.3
0.5
0.3
0.5
Propagation Delay
t
PLH
t
PHL
C
IN
C
L
=50pF, R
L
=500
ns
Input Capacitance
-
0
pF
Power Dissipation
Capacitance
C
PD
(Note)
3.3
pF
5.5
-
12.5
-
-
-
OUTPUT
INPUT
INPUT
L
C
L
R
CC
V
CC
V
tr
tf
90%
50%
10%
V
CC
GND
t
PLH
tw
t
PHL
INPUT
OUTPUT
OH
V
V
OL
50%
50%
A
C includes load and stray capacitance
Input PRR=1.0MHz ; t =500ns
FIGURE 1. AC Test Circuit
FIGURE 3. AC Waveforms
Input=AC Waveform ; t =t =1.8ns
PRR=variable ; Duty Cycle=50%
FIGURE 2. I Test Circuit
AC Loading and Waveforms
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