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參數(shù)資料
| 型號： | KESRX04IG |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 260 to 470MHz. ASK Receiver with Power Down |
| 中文描述： | 260至470MHz。 ASK接收機(jī)的斷電 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大小： | 506K |
| 代理商： | KESRX04IG |
11
KESRX04
PLL
DC PSU (3 to 6V)
KESRX04 PCB
Oscilloscope 1
N/C
N/C
N/C
DATA
RFin RFGND
GND
PD
Vcc
Power Down
Switch
GND
Power Down
Trigger
PLL
Spectrum Analyser
PLL
t
+
Figure 6 Characterising the PLL aquisition time from power-up
Note :
1
2
3
4
High impedance (*10 probe) oscilloscope probe recommended
Loosely coupled antenna or high impedance FET probe recommended for the spectrum analyser measurement.
Time taken for PLL to achieve 90% of final voltage and the VCO within +/- 470kHz. of final frequency (423.33MHz.)
Power down switch operation.
PD0 = PD pin connected to GND, receiver fully powered down.
PD1 = PD pin open circuit or connected to Vcc/2, crystal oscillator running.
PD2 = PD pin connected to Vcc, receiver fully operational.
5.
Spectrum analyser set to PLL lock frequency (423.33MHz), zero span 470kHz IF bandwidth, t sweep 20mS.
Figure 5b KESRX04 selectivity response
Note:
The action of the anti-jam circuit to centre the bandwidth of the receiver around the wanted modulated signal at 433.92MHz
Frequency Response (MHz.)
S
-20
-10
0
10
20
30
40
50
60
70
80
90
431
431.5
432
432.5
433
433.5
434
434.5
435
435.5
436
Anti-jam
connected
Anti-jam
By-passed
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