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參數(shù)資料
| 型號： | KB9224 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | VIDEO-CD 2ND GENERATION |
| 中文描述： | 視頻-環(huán)糊精第二代 |
| 文件頁數(shù)： | 34/55頁 |
| 文件大?。?/td> | 450K |
| 代理商： | KB9224 |
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VIDEO-CD 2ND GENERATION
KB9224
34
TRACKING BALANCE ADJUST CONCEPT
The Tracking Balance Adjust automatically adjusts using the following process: The Tracking error DC offset
extracted from the pre-set DC voltage window level, and the external LPF are comparison monitored by MICOM.
Process Summary
Tracking balance adjust is accomplished in the following manner: With the focus On and spindle servo On, the
tracking and sled servo loop is turned off to make the tracking loop into an open loop. The error signal which has
passed through the wide-range pick-up and the tracking error amp, passes through the external LPF to extract the
DC offset. The DC offset is compared with the pre-selected window comparator level to extract the tracking error
amps DC offset within the window, to inform MICOM using the ISTAT that the balance adjust is complete.
At this time, Tracking E beam-side I/V amps gain is selected by MICOM, and the 6-bit resistance arrays resistance
value is selected by the 6-bit control signal.
The values that MICOM applies are 000000XXX-->111111XXX. If you select the switch, TE1s DC offset increases
the (2.5 V-delta V) --> (2.5 V + delta V) one step at a time, to enter the pre-selected DC window level. When it
enters that level, the balance adjust is completed, and the switch condition is latched at this time.
In this adjust process, the TE1 signals frequency distribution is from DC to 2 kHz, so if DC components are
included, the DC offset which passed LPF are not accurate DC values. Therefore, if the frequency of the TE1
signal is above 1 kHz, MICOM monitors the window comparator output. The frequency check at this time monitors
the Trcnt Pin. Balance Adjust completes the adjustment when the TBAL output is H.
RHI: High level threshold value
Vdc < RLI < RHI
RLI < Vdc < RHI
RLI < RHI < Vdc
RHO
H
H
L
RLO
L
H
H
TBAL (AND gate)
L
H
L
TZC
MIRROR
Gain Adjust
6 bit Array
-
+
-
+
I/V Amp
I/V Amp
69
D
CK
Q
AND
Logic
Vd
c
6 bit (B5~ B0)
from MICOM
70
F
E
F
beam
E
beam
30
29
LPF
RHI
RLI
RLO
RHO
TBAL
ISTAT
TRCNT
To MICOM
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