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參數資料
| 型號： | KB8821 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Tantalum Molded Capacitor; Capacitance: 10uF; Voltage: 35V; Case Size: 3.2x6 mm; Packaging: Tape & Reel |
| 中文描述： | 頻率合成器 |
| 文件頁數： | 20/21頁 |
| 文件大?。?/td> | 237K |
| 代理商： | KB8821 |
20
TEL-97-D003
99-06-15
PRELIMINARY SPECIFICATION (V1.5)
FREQUENCY SYNTHESIZER
KB8821/22/23
PIN DESCRIPTION(24-QFN)
Pin No
( 20-
TSSOP)
Pin No
(24QFN)
Symbol
I / O
Description
1
24
V
DD
1
-
Power supply voltage input for the RF PLL part. V
DD
1 must equal
V
DD
2. In order to reject supply noise, bypass capacitors must be
placed as close as possible to this pin and be connected directly to
the ground plane.
No connection.
Power supply voltage input for RF charge pump(
≥
V
DD
1).
Internal RF charge pump output for connection to an external loop
filter whose filtered output drives an external VCO.
Ground for RF digital blocks.
RF prescaler input. The signal comes from the external VCO.
The complementary input of the RF prescaler. A bypass capacitor
must be placed as close as possible to this pin and be connected
directly to the ground plane. The bypass capacitor is optional with
some loss of sensitivity.
Ground for RF analog blocks.
Reference counter input. TCXO is connected via a coupling
capacitor.
No connection.
Ground for IF digital blocks.
Multiplexed output of the RF/IF programmable counters, the
reference counters, the lock detect signals and the shift registers.
The output level is CMOS level. (see f
out
Programmable Truth
Table)
CMOS clock input. Serial data for the various counters is transfered
into the 22-bit shift register on the rising edge of the clock signal.
No connection.
Binary serial data input. The MSB of CMOS input data is entered
first. The control bits are on the last two bits. CMOS input.
Load enable CMOS input. When LE becomes high, the data in the
shift register is loaded into one of the four latches(by the control
bits).
Ground for IF analog blocks.
The complementary input of the IF prescaler. A bypass capacitor
must be placed as close as possible to this pin and be connected
directly to the ground plane. The bypass capacitor is optional with
some loss of sensitivity.
IF prescaler input. The signal comes from the external VCO.
Ground for IF digital blocks.
Internal IF charge pump output for connection to an external loop
filter whose filtered output drives an external VCO.
No connection.
Power supply voltage input for IF charge pump(
≥
V
DD
2)
-
2
3
1
2
3
-
N/C
-
O
Vp1
CPoRF
4
5
4
5
GND
finRF
-
I
6
6
finRF
I
7
8
7
8
GND
OSCin
-
I
-
9
9
-
N/C
-
10
GND
10
11
f
oLD
O
11
12
CLOCK
I
-
13
14
-
N/C
I
12
DATA
13
15
LE
I
14
16
GND
-
15
17
finIF
I
16
17
18
18
19
20
finIF
GND
CPoIF
I
-
O
-
21
22
-
N/C
-
19
Vp2
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