- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9978 > KAD5512P-12Q72 (Intersil)IC ADC 12BIT 125MSPS SGL 72-QFN PDF資料下載
參數(shù)資料
| 型號： | KAD5512P-12Q72 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 125MSPS SGL 72-QFN |
| 產(chǎn)品培訓(xùn)模塊： | High-Speed Analog-to-Digital Converters |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 235mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
KAD5512P
20
FN6807.4
October 1, 2010
This dual transformer scheme is used to improve common-
mode rejection, which keeps the common-mode level of
the input matched to VCM. The value of the shunt resistor
should be determined based on the desired load
impedance. The differential input resistance of the
KAD5512P is 1000Ω.
The SHA design uses a switched capacitor input stage
(see Figure 43), which creates current spikes when the
sampling capacitance is reconnected to the input voltage.
This causes a disturbance at the input which must settle
before the next sampling point. Lower source impedance
will result in faster settling and improved performance.
Therefore a 1:1 transformer and low shunt resistance are
recommended for optimal performance.
A differential amplifier, as shown in Figure 30, can be
used in applications that require DC-coupling. In this
configuration, the amplifier will typically dominate the
achievable SNR and distortion performance.
The current spikes from the SHA will try to force the
analog input pins toward ground. In cases where the
input pins are biased with more than 50Ω in series from
VCM care must be taken to make sure the input common
mode range is not violated. The provided ICM value
(250A/MHz * 250MHz = 625A at 250MSPS) may be
used to calculate the expected voltage drop across any
series resistance.
VCM Output
The VCM output is buffered with a series output
impedance of 20Ω. It can easily drive a typical ADC
driver’s 10kΩ common mode control pin. If an external
buffer is not used the voltage drop across the internal
20Ω impedance must be considered when calculating the
expected DC bias voltage at the analog input pins.
Clock Input
The clock input circuit is a differential pair (see
Figure 44). Driving these inputs with a high level (up to
1.8VPP on each input) sine or square wave will provide
the lowest jitter performance. A transformer with 4:1
impedance ratio will provide increased drive levels.
The recommended drive circuit is shown in Figure 31. A
duty range of 40% to 60% is acceptable. The clock can
be driven single-ended, but this will reduce the edge rate
and may impact SNR performance. The clock inputs are
internally self-biased to AVDD/2 to facilitate AC coupling.
A selectable 2x frequency divider is provided in series
with the clock input. The divider can be used in the 2x
mode with a sample clock equal to twice the desired
sample rate. This allows the use of the Phase Slip
feature, which enables synchronization of multiple ADCs.
The clock divider can also be controlled through the SPI
port, which overrides the CLKDIV pin setting. Details on this
are contained in “Serial Peripheral Interface” on page 24.
A delay-locked loop (DLL) generates internal clock
signals for various stages within the charge pipeline. If
the frequency of the input clock changes, the DLL may
take up to 52s to regain lock at 250MSPS. The lock time
is inversely proportional to the sample rate.
Jitter
In a sampled data system, clock jitter directly impacts
the achievable SNR performance. The theoretical
relationship between clock jitter (tJ) and SNR is shown in
FIGURE 28. TRANSFORMER INPUT FOR GENERAL
PURPOSE APPLICATIONS
ADT1-1WT
0.1F
KAD5512P
VCM
ADT1-1WT
1000pF
FIGURE 29. TRANSMISSION-LINE TRANSFORMER
INPUT FOR HIGH IF APPLICATIONS
ADTL1-12
0.1F
KAD5512P
VCM
ADTL1-12
1000pF
KAD5512P
VCM
0.1F
0.22F
69.8
49.9
100
348
CM
217
25
69.8
FIGURE 30. DIFFERENTIAL AMPLIFIER INPUT
Ω
TABLE 1. CLKDIV PIN SETTINGS
CLKDIV PIN
DIVIDE RATIO
AVSS
2
Float
1
AVDD
4
FIGURE 31. RECOMMENDED CLOCK DRIVE
TC4-1W
200pF
200O
200pF
CLKP
CLKN
1000pF
Ω
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27499E10F35SB | CONN RCPT 13POS BOX MNT W/SCKT |
| V24B24M250BL2 | CONVERTER MOD DC/DC 24V 250W |
| IDT82V2041EPP | IC LIU T1/J1/E1 1CH 44-TQFP |
| IDT82V2042EPFG8 | IC LIU T1/J1/E1 2CH SHORT 80TQFP |
| V24B24M250BL | CONVERTER MOD DC/DC 24V 250W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KAD5512P-17Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 170MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-17Q72 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 170MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-21Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 210MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-21Q72 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 210MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-25Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 250MSPS SINGL PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。