參數(shù)資料
型號(hào): KA555
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: single timer
中文描述: PULSE; RECTANGULAR, TIMER, PDIP8
封裝: DIP-8
文件頁(yè)數(shù): 5/14頁(yè)
文件大?。?/td> 148K
代理商: KA555
KA555
5
Figure 1 illustrates a monos table circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls
below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's
internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor
C1and setting the flip-flop output at the same time.
The voltage across the external capacitor C1, V
C1
increases exponentially with the time constant t=R
A
*C and reaches 2Vcc/3
at td=1.1R
A
*C. Hence, capacitor C1 is charged through resistor R
A
. The greater the time constant R
A
C, the longer it takes
for the V
C1
to reach 2Vcc/3. In other words, the time constant R
A
C controls the output pulse width.
When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop,
turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.
In this way, the timer operating in monos table repeats the above process. Figure 2 shows the time constant relationship based
on R
A
and C. Figure 3 shows the general waveforms during monos table operation.
It must be noted that, for normal operation, the trigger pulse voltage needs to maintain a minimum of Vcc/3 before the timer
output turns low. That is, although the output remains unaffected even if a different trigger pulse is applied while the output is
high, it may be affected and the waveform not operate properly if the trigger pulse voltage at the end of the output pulse
remains at below Vcc/3. Figure 4 shows such timer output abnormality
.
2. Astable Operation
Figure 4. Waveforms of Monos table Operation (abnormal)
100m
1
10
100
1k
10k
100k
1E-3
0.01
0.1
1
10
100
1M
1M
10k
1k
1k
(R
A
+2R
B
)
C
Frequency(Hz)
Figure 5. Astable Circuit
Figure 6. Capacitance and Resistance vs. Frequency
1
5
6
7
8
4
2
3
RESET
Vcc
DISCH
THRES
CONT
GND
OUT
TRIG
+Vcc
R
A
C1
C2
R
L
R
B
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KA555 制造商:Fairchild Semiconductor Corporation 功能描述:IC TIMER 555 DIP8
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