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    • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄374298 > K9F5608U0C-DCB0 (SAMSUNG SEMICONDUCTOR CO. LTD.) 512Mb/256Mb 1.8V NAND Flash Errata PDF資料下載
    參數(shù)資料
    型號(hào): K9F5608U0C-DCB0
    廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
    英文描述: 512Mb/256Mb 1.8V NAND Flash Errata
    中文描述: 512Mb/256Mb 1.8 NAND閃存勘誤表
    文件頁數(shù): 27/39頁
    文件大?。?/td> 655K
    代理商: K9F5608U0C-DCB0
    第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
    K9F5616U0C-YCB0,YIB0,PCB0,PIB0
    K9F5616U0C-DCB0,DIB0,HCB0,HIB0
    FLASH MEMORY
    26
    K9F5608U0C-YCB0,YIB0,PCB0,PIB0
    K9F5608U0C-DCB0,DIB0,HCB0,HIB0
    K9F5608Q0C-DCB0,DIB0,HCB0,HIB0
    K9F5616Q0C-DCB0,DIB0,HCB0,HIB0
    K9F5608U0C-VCB0,VIB0,FCB0,FIB0
    DEVICE OPERATION
    PAGE READ
    Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00h to the command reg-
    ister along with three address cycles. Once the command is latched, it does not need to be written for the following page read opera-
    tion. Two types of operations are available : random read, serial page read.
    The random read mode is enabled when the page address is changed. The 528 bytes(X8 device) or 264 words(X16 device) of data
    within the selected page are transferred to the data registers in less than 10
    μ
    s(t
    R
    ). The system controller can detect the completion
    of this data transfer(tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the registers, they may be read out
    in 50ns cycle time by sequentially pulsing RE. High to low transitions of the RE clock output the data starting from the selected col-
    umn address up to the last column address[column 511/ 527(X8 device) 255 /263(X16 device) depending on the state of GND input
    pin].
    The way the Read1 and Read2 commands work is like a pointer set to either the main area or the spare area. The spare area of 512
    ~527 bytes(X8 device) or 256~263 words(X16 device) may be selectively accessed by writing the Read2 command with GND input
    pin low. Addresses A
    0~
    A
    3
    (X8 device) or A
    0~
    A
    2
    (X16 device) set the starting address of the spare area while addresses A
    4
    ~A
    7
    are
    ignored in X8 device case
    or
    A
    3~
    A
    7
    must be "L" in X16 device case. The Read1 command is needed to move the pointer back to the
    main area. Figures 8,9 show typical sequence and timings for each read operation.
    Sequential Row Read is available only on K9F5608U0C_Y,P or K9F5608U0C_V,F :
    After the data of last column address is clocked out, the next page is automatically selected for sequential row read. Waiting 10
    μ
    s
    again allows reading the selected page. The sequential row read operation is terminated by bringing CE high. Unless the operation
    is aborted, the page address is automatically incremented for sequential row read as in Read1 operation and spare sixteen bytes of
    each page may be sequentially read. The Sequential Read 1 and 2 operation is allowed only within a block and after the last page
    of a block is readout, the sequential read operation must be terminated by bringing CE high. When the page address moves onto the
    next block, read command and address must be given. Figures 8-1, 9-1 show typical sequence and timings for sequential row read
    operation.
    Figure8. Read1 Operation
    Start Add.(3Cycle)
    00h
    X8 device : A
    0
    ~ A
    7
    & A
    9
    ~ A
    24
    X16 device : A
    0
    ~ A
    7
    & A
    9
    ~ A
    24
    Data Output(Sequential)
    (00h Command)
    Data Field
    Spare Field
    CE
    CLE
    ALE
    R/B
    WE
    RE
    t
    R
    Main array
    (01h Command)
    Data Field
    Spare Field
    1st half array
    2st half array
    NOTE: 1) After data access on 2nd half array by 01h command, the start pointer is automatically moved to 1st half
    array (00h) at next cycle. 01h command is only available on X8 device(K9F5608X0C).
    I/Ox
    On K9F5608U0C_Y,P or K9F5608U0C_V,F
    CE must be held
    low during tR
    1)
    相關(guān)PDF資料
    PDF描述
    K9F5608U0C-DIB0 512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-FCB0 512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-FIB0 512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-HCB0 512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-HIB0 512Mb/256Mb 1.8V NAND Flash Errata
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    K9F5608U0C-DIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-F 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-FCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-FIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
    K9F5608U0C-H 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
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