參數(shù)資料
型號： K7N403609B
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 128Kx36 & 256Kx18 Pipelined NtRAMTM
中文描述： 128K × 36至
文件頁數(shù)： 10/18頁
文件大小： 387K
代理商： K7N403609B
K7N403609B
K7N401809B
128Kx36 & 256Kx18 Pipelined N
t
RAM
TM
- 10 -
Rev 2.0
Nov. 2003
DC ELECTRICAL CHARACTERISTICS
(V
DD
=3.3V+0.165V/-0.165V, T
A
=0
°
C to +70
°
C)
PARAMETER
SYMBOL
Notes :
1.The above parameters are also guaranteed at industrial temperature range.
2. Reference AC Operating Conditions and Characteristics for input and timing.
3. Data states are all zero.
4. In Case of I/O Pins, the Max. V
IH
=V
DDQ
+0.3V
TEST CONDITIONS
MIN
MAX
UNIT
μ
A
μ
A
NOTES
Input Leakage Current(except ZZ)
I
IL
V
DD
=Max ; V
IN
=V
SS
to V
DD
-2
+2
Output Leakage Current
I
OL
Output Disabled,
-2
+2
Operating Current
I
CC
V
DD
=Max , I
OUT
=0mA
ZZ
≤
V
IL ,
Cycle Time
≥
t
CYC
Min
Device deselected, I
OUT
=0mA,
ZZ
≤
V
IL
, f=Max,
All Inputs
≤
0.2V or
≥
V
DD
-0.2V
Device deselected, I
OUT
=0mA, ZZ
≤
0.2V, f=0,
All Inputs=fixed (V
DD
-0.2V or 0.2V)
Device deselected, I
OUT
=0mA, ZZ
≥
V
DD
-0.2V,
f=Max, All Inputs
≤
V
IL
or
≥
V
IH
I
OL
=8.0mA
I
OH
=-4.0mA
I
OL
=1.0mA
I
OH
=-1.0mA
-20
-
330
mA
1,2
Standby Current
I
SB
-20
-
150
mA
I
SB1
-
80
mA
I
SB2
-
50
mA
Output Low Voltage(3.3V I/O)
Output High Voltage(3.3V I/O)
Output Low Voltage(2.5V I/O)
Output High Voltage(2.5V I/O)
Input Low Voltage(3.3V I/O)
Input High Voltage(3.3V I/O)
Input Low Voltage(2.5V I/O)
Input High Voltage(2.5V I/O)
V
OL
V
OH
V
OL
V
OH
V
IL
V
IH
V
IL
V
IH
-
0.4
-
0.4
-
0.8
V
V
V
V
V
V
V
V
2.4
-
2.0
-0.3*
2.0
-0.3*
1.7
V
DD
+0.3**
0.7
V
DD
+0.3**
3
3
V
SS
V
IH
V
SS-
1.0V
20% t
CYC
(MIN)
(V
DD
=3.3V+0.165V/-0.165V,V
DDQ
=3.3V+0.165/-0.165V or V
DD
=3.3V+0.165V/-0.165V,V
DDQ
=2.5V+0.4V/-0.125V, T
A
=0to70
°
C)
TEST CONDITIONS
* The above parameters are also guaranteed at industrial temperature range.
PARAMETER
VALUE
Input Pulse Level(for 3.3V I/O)
0 to 3.0V
Input Pulse Level(for 2.5V I/O)
0 to 2.5V
Input Rise and Fall Time(Measured at 20% to 80% for 3.3V I/O)
1.0V/ns
Input Rise and Fall Time(Measured at 20% to 80% for 2.5V I/O)
1.0V/ns
Input and Output Timing Reference Levels for 3.3V I/O
1.5V
Input and Output Timing Reference Levels for 2.5V I/O
V
DDQ
/2
Output Load
See Fig. 1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K7N403609B_06 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx36 & 256Kx18 Pipelined NtRAM
K7N403609B-PC20000 制造商:Samsung SDI 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 2.8ns 100-Pin TQFP 制造商:Samsung Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 2.8ns 100-Pin TQFP
K7N403609B-QC20 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx36 & 256Kx18 Pipelined NtRAMTM
K7N403609B-QC25000 制造商:Samsung Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 2.4ns 100-Pin TQFP Tray
K7N420 PRO 制造商:Micro-Star International 功能描述:SOCKET A MOTHERBOARD - Bulk
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