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參數(shù)資料
| 型號： | K7A401800B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128Kx36/x32 & 256Kx18 Synchronous SRAM |
| 中文描述： | 128Kx36/x32 |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 470K |
| 代理商： | K7A401800B |
K7A401800B
128Kx36/x32 & 256Kx18 Synchronous SRAM
- 9 -
Rev 1.0
Nov 2001
K7A403200B
K7A403600B
DC ELECTRICAL CHARACTERISTICS
(T
A
=0 to 70
°
C, V
DD
=3.3V+0.3V/-0.165V)
The above parameters are also guaranteed at industrial temperature range.
* V
IL
(Min)=-2.0(Pulse Width
≤
t
CYC
/
2)
** V
IH
(Max)=4.6(Pulse Width
≤
t
CYC
/
2)
** In Case of I/O Pins, the Max. V
IH
=V
DDQ
+0.3V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
Input Leakage Current(except ZZ)
I
IL
V
DD
= Max ; V
IN
=V
SS
to V
DD
-2
+2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled, V
OUT
=V
SS
to V
DDQ
-2
+2
Operating Current
I
CC
Device Selected, I
OUT
=0mA, ZZ
≤
V
IL
,
All Inputs=V
IL
or V
IH
, Cycle Time
≥
cyc Min
-16
-
290
mA
-14
-
250
Standby Current
I
SB
Device deselected, I
OUT
=0mA,ZZ
≤
V
IL
,
f=Max, All Inputs
≤
0.2V or
≥
V
DD
-0.2V
-16
-
140
mA
-14
-
130
I
SB1
Device deselected, I
OUT
=0mA, ZZ
≤
0.2V,
f = 0, All Inputs=fixed (V
DD
-0.2V or 0.2V)
-
80
mA
I
SB2
Device deselected, I
OUT
=0mA, ZZ
≥
V
DD
-0.2V,
f=Max, All Inputs
≤
V
IL
or
≥
V
IH
-
50
mA
Output Low Voltage(3.3V I/O)
V
OL
I
OL
= 8.0mA
-
0.4
V
Output High Voltage(3.3V I/O)
V
OH
I
OH
= -4.0mA
2.4
-
V
Output Low Voltage(2.5V I/O)
V
OL
I
OL
= 1.0mA
-
0.4
V
Output High Voltage(2.5V I/O)
V
OH
I
OH
= -1.0mA
2.0
-
V
Input Low Voltage(3.3V I/O)
V
IL
-0.5*
0.8
V
Input High Voltage(3.3V I/O)
V
IH
2.0
V
DD
+0.3**
V
Input Low Voltage(2.5V I/O)
V
IL
-0.3*
0.7
V
Input High Voltage(2.5V I/O)
V
IH
1.7
V
DD
+0.3**
V
TEST CONDITIONS
(V
DD
=3.3V+0.3V/-0.165V,V
DDQ
=3.3V+0.3/-0.165V or V
DD
=3.3V+0.3V/-0.165V,V
DDQ
=2.5V+0.4V/-0.125V, T
A
=0 to 70
°
C)
PARAMETER
VALUE
Input Pulse Level(for 3.3V I/O)
0 to 3V
Input Pulse Level(for 2.5V I/O)
0 to 2.5V
Input Rise and Fall Time(Measured at 0.3V and 2.7V for 3.3V I/O)
1ns
Input Rise and Fall Time(Measured at 0.3V and 2.1V for 2.5V I/O)
1ns
Input and Output Timing Reference Levels for 3.3V I/O
1.5V
Input and Output Timing Reference Levels for 2.5V I/O
V
DDQ
/2
Output Load
* The above parameters are also guaranteed at industrial temperature range.
See Fig. 1
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