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參數(shù)資料
| 型號： | K4S640432H-TC |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| 中文描述： | 64兆?芯片與內(nèi)存規(guī)格鉛54 TSOP-II免費 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 144K |
| 代理商： | K4S640432H-TC |
SDRAM 64Mb H-die (x4, x8, x16)
CMOS SDRAM
Rev. 1.8 August 2004
AC OPERATING TEST CONDITIONS
(V
DD
= 3.3V
±
0.3V, T
A
= 0 to 70
°
C)
Parameter
Value
Unit
AC input levels (Vih/Vil)
2.4/0.4
V
Input timing measurement reference level
1.4
V
Input rise and fall time
tr/tf = 1/1
ns
Output timing measurement reference level
1.4
V
Output load condition
See Fig. 2
3.3V
1200
870
Output
30pF
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
Vtt = 1.4V
50
Output
30pF
Z0 = 50
(Fig. 2) AC output load circuit
(Fig. 1) DC output load circuit
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Symbol
Version
Unit
Note
60
12
18
18
42
70
14
20
20
49
100
68
2
75
15
20
20
45
Row active to row active delay
RAS to CAS delay
Row precharge time
t
RRD
(min)
t
RCD
(min)
t
RP
(min)
t
RAS
(min)
t
RAS
(max)
t
RC
(min)
t
RDL
(min)
t
DAL
(min)
t
CDL
(min)
t
BDL
(min)
t
CCD
(min)
ns
ns
ns
ns
us
ns
CLK
-
CLK
CLK
CLK
1
1
1
1
Row active time
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Col. address to col. address delay
60
65
1
2,5
5
2
2
3
2 CLK + tRP
1
1
1
2
1
Number of valid output data
CAS latency = 3
CAS latency = 2
ea
4
相關(guān)PDF資料 |
PDF描述 |
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| K4S640832H-TC75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640832H-UL75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640832H-TL75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640432H-UC | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640432H-UL75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S640432H-TC75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640432H-TL75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640432H-UC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640432H-UC75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640432H-UL75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
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