- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374281 > K4S640432H-TC75 (SAMSUNG SEMICONDUCTOR CO. LTD.) 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free PDF資料下載
參數(shù)資料
| 型號： | K4S640432H-TC75 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| 中文描述： | 64兆?芯片與內(nèi)存規(guī)格鉛54 TSOP-II免費 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大小： | 144K |
| 代理商： | K4S640432H-TC75 |
SDRAM 64Mb H-die (x4, x8, x16)
CMOS SDRAM
Rev. 1.8 August 2004
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
DQ BUFFER OUTPUT DRIVE CHARACTERISTICS
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Notes
Output rise time
trh
Measure in linear
region : 1.2V ~ 1.8V
1.37
4.37
Volts/ns
3
Output fall time
tfh
Measure in linear
region : 1.2V ~ 1.8V
1.30
3.8
Volts/ns
3
Output rise time
trh
Measure in linear
region : 1.2V ~ 1.8V
2.8
3.9
5.6
Volts/ns
1,2
Output fall time
tfh
Measure in linear
region : 1.2V ~ 1.8V
2.0
2.9
5.0
Volts/ns
1,2
1. Rise time specification based on 0pF + 50
to V
SS
, use these values to design to.
2. Fall time specification based on 0pF + 50
to V
DD
, use these values to design to.
3. Measured into 50pF only, use these values to characterize to.
4. All measurements done with respect to V
SS
.
Notes :
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Parameter
Symbol
60
70
75
Unit
Note
Min
Max
Min
Max
Min
Max
CLK cycle time
CAS latency=3
t
CC
6
1000
7
1000
7.5
1000
ns
1
CAS latency=2
10
10
10
CLK to valid
output delay
CAS latency=3
t
SAC
-
5
-
6
-
5.4
ns
1,2
CAS latency=2
-
6
-
6
-
6
Output data
hold time
CAS latency=3
t
OH
2.5
-
3
-
3
-
ns
2
CAS latency=2
3
-
3
-
3
-
CLK high pulse width
t
CH
2.5
-
3
-
2.5
-
ns
3
CLK low pulse width
t
CL
2.5
-
3
-
2.5
-
ns
3
Input setup time
t
SS
1.5
-
2
-
1.5
-
ns
3
Input hold time
t
SH
1
-
1
-
0.8
-
ns
3
CLK to output in Low-Z
t
SLZ
1
-
1
-
1
-
ns
2
CLK to output
in Hi-Z
CAS latency=3
t
SHZ
-
5
-
6
-
5.4
ns
CAS latency=2
-
6
-
6
-
6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S640432H-TL75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640432H-UC75 | D-Subminiature Connector; Gender:Female; No. of Contacts:50; Contact Termination:IDC; D Sub Shell Size:DB50; Body Material:Steel; Contact Plating:Gold Over Nickel RoHS Compliant: Yes |
| K4S640432H-TC | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640832H-TC75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640832H-UL75 | 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S640432H-TL75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free |
| K4S640432H-UC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640432H-UC75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640432H-UL75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S640832C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。