參數(shù)資料
型號: K4S640432E-L1H
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4M x 4Bit x 4 Banks Synchronous DRAM
中文描述: 4米× 4位× 4銀行同步DRAM
文件頁數(shù): 5/10頁
文件大?。?/td> 77K
代理商: K4S640432E-L1H
K4S640432E
CMOS SDRAM
Rev.0.1 Sept. 2001
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S640432E-TC**
4. K4S640432E-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
Notes :
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
Unit
Note
- 75
- 1H
- 1L
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
t
RC
(min)
I
O
= 0 mA
70
65
65
mA
1
Precharge standby current in
power-down mode
I
CC2
P
CKE
V
IL
(max), t
CC
= 10ns
1
mA
I
CC2
PS
CKE & CLK
V
IL
(max), t
CC
=
1
Precharge standby current in
non power-down mode
I
CC2
N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
15
mA
I
CC2
NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
6
Active standby current in
power-down mode
I
CC3
P
CKE
V
IL
(max), t
CC
= 10ns
3
mA
I
CC3
PS
CKE & CLK
V
IL
(max), t
CC
=
3
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
25
mA
I
CC3
NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
15
Operating current
(Burst mode)
I
CC4
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
100
80
80
mA
1
Refresh current
I
CC5
t
RC
t
RC
(min)
135
125
125
mA
2
Self refresh current
I
CC6
CKE
0.2V
C
1
mA
3
L
400
uA
4
DC CHARACTERISTICS
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參數(shù)描述
K4S640432E-L1L 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 4Bit x 4 Banks Synchronous DRAM
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