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參數(shù)資料
| 型號(hào)： | K4S281632D-TP7C |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 80K |
| 代理商： | K4S281632D-TP7C |
CMOS SDRAM
K4S281632D
Rev. 0.1 Sept. 2001
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VDD supply relative to Vss
VDD, VDDQ
-1.0 ~ 4.6
V
Storage temperature
TSTG
-55 ~ +150
°C
Power dissipation
PD
1
W
Short circuit current
IOS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -40 to 85
°C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
VDD, VDDQ
3.0
3.3
3.6
V
4
Input logic high voltage
VIH
2.0
3.0
VDD+0.3
V
1
Input logic low voltage
VIL
-0.3
0
0.8
V
2
Output logic high voltage
VOH
2.4
-
V
IOH = -2mA
Output logic low voltage
VOL
-
0.4
V
IOL = 2mA
Input leakage current
ILI
-10
-
10
uA
3
1. VIH (max) = 5.6V AC.The overshoot voltage duration is
≤ 3ns.
2. VIL (min) = -2.0V AC. The undershoot voltage duration is
≤ 3ns.
3. Any input 0V
≤ VIN ≤ VDDQ,
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. The VDD condition of K4S281632D-60 is 3.135V~3.6V.
Notes :
CAPACITANCE (VDD = 3.3V, TA = 23
°C, f = 1MHz, VREF =1.4V ± 200 mV)
Pin
Symbol
Min
Max
Unit
Note
Clock
CCLK
2.5
4.0
pF
1
RAS, CAS, WE, CS, CKE, DQM
CIN
2.5
5.0
pF
2
Address
CADD
2.5
5.0
pF
2
DQ0 ~ DQ15
COUT
4.0
6.5
pF
3
1. -75/7C specify a maximum value of 3.5pF
2. -75/7C specify a maximum value of 3.8pF
3. -75/7C specify a maximum value of 6.0pF
Notes :
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