
-  2  -
REV. 1.0 November. 2. 2000
128Mb DDR SDRAM
Revision History
Version 0 (May, 1998)
  - First version for internal review
Version 0.1(June, 1998)
  - Added x4 organization
Version 0.2(Sep,1998)
 1. Added "Issue prcharge command for all banks of the device" as the fourth step of power-up squence. 
 2. In power down mode timing diagram, NOP condition is added to precharge power down exit. 
Version 0.3(Dec,1998)
- Added QFC Function.
 - 
Added DC current value
- Reduce I/O capacitance values  
Version 0.4(Feb,1999)
 -Added DDR SDRAM  history for reference(refer to the following page)
  -Added low power version DC spec
Version 0.5(Apr,1999)
-Revised following first showing for JEDEC standard
-
Added DC target current based on new DC test condition
Version 0.6(July 1,1999)
  1.Modified binning policy
             From                                 To
        -Z (133Mhz)            -Z (133Mhz/266Mbps@CL=2)
        -8 (125Mhz)            -Y (133Mhz/266Mbps@CL=2.5)
        -0 (100Mhz)            -0 (100Mhz/200Mbps@CL=2)   
  2.Modified the following AC spec values
*1
 : Changed description method for the same functionality. This means no difference from the previous version.
  3.Changed the following AC parameter symbol
                                                                                                From.                     To.                          
     Output data access time from CK/CK                       tDQCK                   tAC
Version 0.61(August 9,1999)
  - Changed the some values of "write with auto precharge" table for different bank in page 31.
From.
To.
-Z
-0
-Z
-Y
-0
tAC
+/- 0.75ns
+/- 1ns
+/- 0.75ns
+/- 0.75ns
+/- 0.8ns
tDQSCK
+/- 0.75ns
+/- 1ns
+/- 0.75ns
+/- 0.75ns
+/- 0.8ns
tDQSQ
+/- 0.5ns
+/- 0.75ns 
+/- 0.5ns
+/- 0.5ns
+/- 0.6ns
tDS/tDH
0.5 ns
0.75 ns
0.5 ns
0.5 ns
0.6 ns
tCDLR
*1
tPRE
*1
tRPST
*1
tHZQ
*1
2.5tCK-tDQSS
2.5tCK-tDQSS
1tCK
1tCK
1tCK
1tCK +/- 0.75ns
1tCK +/- 1ns
0.9/1.1 tCK
0.9/1.1 tCK
0.9/1.1 tCK
tCK/2 +/- 0.75ns
tCK/2 +/- 1ns
0.4/0.6 tCK
0.4/0.6 tCK
0.4/0.6 tCK
tCK/2 +/- 0.75ns
tCK/2 +/- 1ns
+/- 0.75ns
+/- 0.75ns
+/-0.8ns
Asserted
command
For Different Bank
3
4
Old
New
Old
New
Read
Legal
Illegal
Legal
Illegal
Read + AP
*1
Legal
Illegal
Legal
Illegal