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參數(shù)資料
| 型號： | K4H563238B-TLA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| 中文描述： | 128MB DDR SDRAM的 |
| 文件頁數(shù)： | 39/53頁 |
| 文件大?。?/td> | 669K |
| 代理商： | K4H563238B-TLA2 |
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- 39 -
REV. 1.0 November. 2. 2000
128Mb DDR SDRAM
6. Absolute Maximum Rating
7. DC Operating Conditions & Specifications
7.1 DC Operating Conditions
Parameter
Symbol
Value
Unit
Voltage on any pin relative to V
SS
V
IN
, V
OUT
-0.5 ~ 3.6
V
Voltage on V
DD
supply relative to V
SS
V
DD
, V
DDQ
-1.0 ~ 3.6
V
Voltage on V
DDQ
supply relative to V
SS
V
DDQ
-0.5 ~ 3.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1.0
W
Short circuit current
I
OS
50
mA
Note :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
Recommended operating conditions(Voltage referenced to V
SS
=0V, T
A
=0 to 70
°
C)
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage(for device with a nominal V
DD
of 2.5V)
V
DD
2.3
2.7
I/O Supply voltage
V
DDQ
2.3
2.7
V
I/O Reference voltage
V
REF
0.49*VDDQ
0.51*VDDQ
V
1
I/O Termination voltage(system)
V
TT
V
REF
-0.04
V
REF
+0.04
V
2
Input logic high voltage
V
IH
(DC)
V
REF
+0.15
V
DDQ
+0.3
V
Input logic low voltage
V
IL
(DC)
-0.3
V
REF
-0.15
V
Input Voltage Level, CK and CK inputs
V
IN
(DC)
-0.3
V
DDQ
+0.3
V
Input Differential Voltage, CK and CK inputs
V
ID
(DC)
0.3
V
DDQ
+0.6
V
3
Input leakage current
I
I
-2
2
uA
Output leakage current
I
OZ
-5
5
uA
Output High Current (V
OUT
= 1.95V)
I
OH
-16.8
mA
Output Low Current (V
OUT
= 0.35V)
I
OL
16.8
mA
Notes 1. V
REF
is expected to be equal to 0.5*V
DDQ
of the transmitting device, and to track variations in the DC level of the same. Peak-to-
peak noise on V
REF
may not exceed 2% of the DC value
2.V
TT
is not applied directly to the device. V
TT
is a system supply for signal termination resistors, is expected to be set equal to
V
REF
, and must track variations in the DC level of V
REF
3. V
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
Table 10. Absolute maximum ratings
Table 11. DC operating condition
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4H563238B-TLB0 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| K4H563238C-TCA0 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| K4H563238C-TCA2 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| K4H563238C-TCB0 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 28-PLCC -40 to 85 |
| K4H1G0438M-LA2 | 1Gb M-die DDR SDRAM Specification 66 TSOP-II with Pb-Free (RoHS compliant) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4H563238B-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H563238C-TCA0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H563238C-TCA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H563238C-TCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H563238C-TLA0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
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