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參數(shù)資料
| 型號： | K4H560438C-TLA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Quadruple 2-Input Positive-NOR Gates 14-SOIC -40 to 85 |
| 中文描述： | 四2正輸入或非門 14-SOIC封裝；-40℃到85℃ |
| 文件頁數(shù)： | 9/26頁 |
| 文件大?。?/td> | 291K |
| 代理商： | K4H560438C-TLA2 |
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K4H560438D
DDR SDRAM
Rev. 2.2 Mar. ’03
16M x 4Bit x 4 Banks Double Data Rate SDRAM
Absolute Maximum Rating
Parameter
Symbol
VIN, VOUT
VDD, VDDQ
TSTG
PD
IOS
Value
-0.5 ~ 3.6
-1.0 ~ 3.6
-55 ~ +150
1.5
50
Unit
V
V
°
C
W
mA
Voltage on any pin relative to VSS
Voltage on VDD & VDDQ supply relative to VSS
Storage temperature
Power dissipation
Short circuit current
Note :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
DC Operating Conditions
Recommended operating conditions(Voltage referenced to V
SS
=0V, T
A
= 0 to 70
°
C)
The K4H560438D is 268,435,456 bits of double data rate synchronous DRAM organized as 4 x 16,777,216 words by 4 bits, fabricated
with SAMSUNG
′
s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to
333Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable burst length and
programmable latencies allow the device to be useful for a variety of high performance memory system applications.
GENERAL DESCRIPTION
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage(for device with a nominal V
DD
of 2.5V)
V
DD
2.3
2.7
I/O Supply voltage
V
DDQ
2.3
2.7
V
I/O Reference voltage
V
REF
VDDQ/2-50mV
VDDQ/2+50mV
V
1
I/O Termination voltage(system)
V
TT
V
REF
-0.04
V
REF
+0.04
V
2
Input logic high voltage
V
IH
(DC)
V
REF
+0.15
V
DDQ
+0.3
V
4
Input logic low voltage
V
IL
(DC)
-0.3
V
REF
-0.15
V
4
Input Voltage Level, CK and CK inputs
V
IN
(DC)
-0.3
V
DDQ
+0.3
V
Input Differential Voltage, CK and CK inputs
V
ID
(DC)
0.3
V
DDQ
+0.6
V
3
Input crossing point voltage, CK and CK inputs
V
IX
(DC)
1.15
1.35
V
5
Input leakage current
I
I
-2
2
uA
Output leakage current
I
OZ
-5
5
uA
Output High Current(Normal strengh driver)
;V
OUT
= V
TT
+ 0.84V
I
OH
-16.8
mA
Output High Current(Normal strengh driver)
;V
OUT
= V
TT
- 0.84V
I
OL
16.8
mA
Output High Current(Half strengh driver)
;V
OUT
=
V
TT
+ 0.45V
I
OH
-9
mA
Output High Current(Half strengh driver)
;V
OUT
= V
TT
- 0.45V
I
OL
9
mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4H560438C-TLB0 | 128Mb DDR SDRAM |
| K4H560438D-TC | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 14-PDIP -40 to 125 |
| K4H560438D-TCA0 | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 16-SOIC 0 to 70 |
| K4H560438D-TCA2 | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 16-SOIC 0 to 70 |
| K4H560438D-TCB0 | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 16-SOIC 0 to 70 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4H560438C-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H560438D-GC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR 256Mb |
| K4H560438D-GCA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR 256Mb |
| K4H560438D-GCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR 256Mb |
| K4H560438D-GCB3 | 制造商:Samsung Semiconductor 功能描述:DRAM Chip DDR SDRAM 256M-Bit 64Mx4 2.5V 60-Pin FBGA Tray |
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