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參數(shù)資料
| 型號： | K4H510838F-LCCC |
| 元件分類： | DRAM |
| 英文描述： | 64M X 8 DDR DRAM, 0.65 ns, PDSO66 |
| 封裝： | 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 361K |
| 代理商： | K4H510838F-LCCC |
Rev. 1.1 November 2008
DDR SDRAM
K4H510438F
K4H510838F
K4H511638F
19 of 24
Component Notes
17. For CK & CK slew rate
≥ 1.0 V/ns
18. These parameters guarantee device timing, but they are not necessarily tested on each device. They may be guaranteed by
device design or tester correlation.
19. Slew Rate is measured between VOH(AC) and VOL(AC).
20. Min (tCL, tCH) refers to the smaller of the actual clock low time and the actual clock high time as provided to the device (i.e. this
value can be greater than the minimum specification limits for tCL and tCH).....For example, tCL and tCH are = 50% of the
period, less the half period jitter (tJIT(HP)) of the clock source, and less the half period jitter due to crosstalk (tJIT(crosstalk)) into
the clock traces.
21. tQH = tHP - tQHS, where:
tHP = minimum half clock period for any given cycle and is defined by clock high or clock low (tCH, tCL). tQHS accounts for 1) The
pulse duration distortion of on-chip clock circuits; and 2) The worst case push-out of DQS on one tansition followed by the worst
case pull-in of DQ on the next transition, both of which are, separately, due to data pin skew and output pattern effects, and p-
channel to n-channel variation of the output drivers.
22. tDQSQ
Consists of data pin skew and output pattern effects, and p-channel to n-channel variation of the output drivers for any given cycle.
23. tDAL = (tWR/tCK) + (tRP/tCK)
For each of the terms above, if not already an integer, round to the next highest integer. Example: For DDR266 at CL=2.5 and
tCK=7.5ns tDAL = (15 ns / 7.5 ns) + (20 ns/ 7.5ns) = (2) + (3)
tDAL = 5 clocks
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4H510838G | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Consumer Memory |
| K4H510838G-LC/LB3 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb G-die DDR SDRAM Specification |
| K4H510838G-LC/LCC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb G-die DDR SDRAM Specification |
| K4H510838J-BCB3000 | 制造商:Samsung Semiconductor 功能描述:K4H510838J-BCB3000 - Trays |
| K4H510838J-BCCC000 | 制造商:Samsung Semiconductor 功能描述: |
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