參數(shù)資料
型號(hào): K4H280438D-TLB0
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Mb DDR SDRAM
中文描述: 128MB DDR SDRAM的
文件頁(yè)數(shù): 9/23頁(yè)
文件大?。?/td> 298K
代理商: K4H280438D-TLB0
DDR SDRAM
DDR SDRAM 128Mb F-die (x4, x8)
Rev. 1.1 May. 2004
8M x 4Bit x 4 Banks / 4M x 8Bit x 4 Banks Double Data Rate SDRAM
The K4H280438F / K4H280838F is 134,217,728 bits of double data rate synchronous DRAM organized as 4x 8,388,608 / 4x 4,194,304
words by 4/ 8bits, fabricated with SAMSUNG
s high performance CMOS technology. Synchronous features with Data Strobe allow
extremely high performance up to 333Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequen-
cies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory
system applications.
General Description
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Voltage on any pin relative to V
SS
V
IN
, V
OUT
-0.5 ~ 3.6
V
Voltage on V
DD
& V
DDQ
supply relative to V
SS
V
DD
, V
DDQ
-1.0 ~ 3.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1.5
W
Short circuit current
I
OS
50
mA
Note :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC Operating Conditions
Recommended operating conditions(Voltage referenced to V
SS
=0V, T
A
=0 to 70
°
C)
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage(for device with a nominal V
DD
of 2.5V)
V
DD
2.3
2.7
I/O Supply voltage
V
DDQ
2.3
2.7
V
I/O Reference voltage
V
REF
0.49*VDDQ
0.51*VDDQ
V
1
I/O Termination voltage(system)
V
TT
V
REF
-0.04
V
REF
+0.04
V
2
Input logic high voltage
V
IH
(DC)
V
REF
+0.15
V
DDQ
+0.3
V
Input logic low voltage
V
IL
(DC)
-0.3
V
REF
-0.15
V
Input Voltage Level, CK and CK inputs
V
IN
(DC)
-0.3
V
DDQ
+0.3
V
Input Differential Voltage, CK and CK inputs
V
ID
(DC)
0.36
V
DDQ
+0.6
V
3
V-I Matching: Pullup to Pulldown Current Ratio
VI(Ratio)
0.71
1.4
-
4
Input leakage current
I
I
-2
2
uA
Output leakage current
I
OZ
-5
5
uA
Output High Current(Normal strengh driver) ;V
OUT
= V
TT
+ 0.84V
I
OH
-16.8
mA
Output High Current(Normal strengh driver) ;V
OUT
= V
TT
- 0.84V
I
OL
16.8
mA
Output High Current(Half strengh driver) ;V
OUT
= V
TT
+ 0.45V
I
OH
-9
mA
Output High Current(Half strengh driver) ;V
OUT
= V
TT
- 0.45V
I
OL
9
mA
1.VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same.
Peak-to peak noise on VREF may not exceed +/-2% of the dc value.
2. V
TT
is not applied directly to the device. V
TT
is a system supply for signal termination resistors, is expected to be set equal to
V
REF
, and must track variations in the DC level of V
REF
3. V
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire
temperature and voltage range, for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the
maximum difference between pullup and pulldown drivers due to process variation. The full variation in the ratio of the
maximum to minimum pullup and pulldown current will not exceed 1/7 for device drain to source voltages from 0.1 to 1.0.
Note :
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