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參數(shù)資料
| 型號： | K4D263238A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| 中文描述： | 100萬x 32Bit的× 4銀行雙數(shù)據(jù)速率同步DRAM的雙向數(shù)據(jù)選通和DLL |
| 文件頁數(shù)： | 15/17頁 |
| 文件大小： | 298K |
| 代理商： | K4D263238A |
128M DDR SDRAM
K4D263238A-GC
- 15 -
Rev. 2.0 (Jan. 2003)
AC CHARACTERISTICS (II)
K4D263238A-GC33
Frequency
300MHz ( 3.3ns )
275MHz ( 3.6ns )
250MHz ( 4.0ns )
222MHz ( 4.5ns )
200MHz ( 5.0ns )
Cas Latency
5
5
4
4
3
tRC
17
16
15
13
12
tRFC
19
18
17
15
14
tRAS
12
11
10
9
8
tRCDRD
6
5
5
4
4
tRCDWR
4
3
3
2
2
tRP
5
5
5
4
4
tRRD
3
3
3
2
2
tDAL
8
8
8
7
7
Unit
tCK
tCK
tCK
tCK
tCK
K4D263238A-GC36
Frequency
275MHz ( 3.6ns )
250MHz ( 4.0ns )
222MHz ( 4.5ns )
200MHz ( 5.0ns )
Cas Latency
5
4
4
3
tRC
16
15
13
12
tRFC
18
17
15
14
tRAS
11
10
9
8
tRCDRD
5
5
4
4
tRCDWR
3
3
2
2
tRP
5
5
4
4
tRRD
3
3
2
2
tDAL
8
8
7
7
Unit
tCK
tCK
tCK
tCK
(Unit : Number of Clock)
AC CHARACTERISTICS (I)
Note : 1. For normal write operation, even numbers of Din are to be written inside DRAM
Parameter
Sym-
bol
t
RC
t
RFC
t
RAS
t
RCDR
-33
-36
-40
-45
-50
Unit Note
Min
17
19
12
Max
-
-
100K
Min
16
18
11
Max
-
-
100K
Min
15
17
10
Max
-
-
100K
Min
13
15
9
Max
-
-
100K
Min
12
14
8
Max
-
-
100K
Row cycle time
Refresh row cycle time
Row active time
tCK
tCK
tCK
RAS to CAS delay for Read
6
-
5
-
5
-
4
-
4
-
tCK
RAS to CAS delay for Write
t
RCDW
4
3
3
2
2
-
tCK
Row precharge time
Row active to Row active
Last data in to Row precharge
@Normal Precharge
Last data in to Row precharge
@Auto Precharge
Last data in to Read command
t
CDLR
Col. address to Col. address
Mode register set cycle time
Auto precharge write recovery
+ Precharge
Exit self refresh to read com-
t
RP
t
RRD
5
3
-
-
5
3
-
-
5
3
-
-
4
2
-
-
4
2
-
-
tCK
tCK
t
WR
3
-
3
-
3
-
3
-
2
-
tCK
1
t
WR_A
3
-
3
-
3
-
3
-
3
-
tCK
1
2
1
2
-
-
-
2
1
2
-
-
-
2
1
2
-
-
-
2
1
2
-
-
-
2
1
2
-
-
-
tCK
tCK
tCK
1
t
CCD
t
MRD
t
DAL
8
-
8
-
8
-
7
-
7
-
tCK
t
XSR
t
PDEX
t
REF
200
-
200
-
200
-
200
-
200
-
tCK
Power down exit time
Refresh interval time
1tCK+tIS
7.8
-
-
1tCK+tIS
7.8
-
-
1tCK+tIS
7.8
-
-
1tCK+tIS
7.8
-
-
1tCK+tIS
7.8
-
-
ns
us
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| K4D263238A-GC36 | DIODE ZENER SINGLE 500mW 3Vz 0.05mA-Izt 0.05 0.8uA-Ir 1 SOD-123 3K/REEL |
| K4D263238A-GC40 | DIODE ZENER SINGLE 500mW 3.3Vz 0.05mA-Izt 0.05 7.5uA-Ir 1.5 SOD-123 3K/REEL |
| K4D263238A-GC45 | DIODE ZENER SINGLE 500mW 3.6Vz 0.05mA-Izt 0.05 7.5uA-Ir 2 SOD-123 3K/REEL |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4D263238A-GC33 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238A-GC36 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238A-GC40 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238A-GC45 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238A-GC50 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
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