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    參數(shù)資料
    

    


    


    
型號(hào)：
K4B1G0846C-ZCG9

    

    
廠商：
SAMSUNG SEMICONDUCTOR CO. LTD.

    

    
英文描述：
1Gb C-die DDR3 SDRAM Specification

    

    
中文描述：
1Gb的?芯片的DDR3 SDRAM規(guī)范

    

    
文件頁數(shù)：
3/63頁

    

    
文件大?。?/td>
1255K

    

    
代理商：
K4B1G0846C-ZCG9


    

    

    

	
    
    
    

    
    
	
    Page 3 of 63
    Rev. 1.0 June 2007
    1Gb DDR3 SDRAM
    K4B1G04(08/16)46C
    1.0 Ordering Information ....................................................................................................................................................4
    2.0 Key Features .................................................................................................................................................................4
    3.0 Package pinout/Mechanical Dimension & Addressing .............................................................................................5
           3.1 x4 Package Pinout (Top view) : 94ball FBGA  Package(78balls + 16 balls of support balls)
     ..........................................5
           3.2 x8 Package Pinout (Top view) : 94ball FBGA  Package(78balls + 16 balls of support balls) 
    ..........................................6
           3.3 x16 Package Pinout (Top view) : 112ball FBGA  Package(96balls + 16 balls of support balls)
     ......................................7
           3.4 FBGA Package Dimension (x4) 
    ...................................................................................................................................8
           3.5 FBGA Package Dimension (x8)
     ...................................................................................................................................9
           3.6 FBGA Package Dimension (x16)
     ...............................................................................................................................10
    4.0 Input/Output Functional Description ........................................................................................................................11
    5.0 DDR3 SDRAM Addressing .........................................................................................................................................12
    6.0 Absolute Maximum Ratings .......................................................................................................................................14
           6.1 Absolute Maximum DC Ratings 
    ................................................................................................................................14
           6.2 DRAM Component Operating Temperature Range
     ....................................................................................................14
    7.0 AC & DC Operating Conditions .................................................................................................................................14
           7.1 Recommended DC operating Conditions (SSTL_1.5)
     .................................................................................................14
    8.0 AC & DC Input Measurement Levels .........................................................................................................................15
           8.1 AC and DC Logic input levels for single-ended signals
     .............................................................................................15
           8.2 Differential swing requirement  for differntial signals
     ................................................................................................16
         8.2.1 Single-ended requirements for differential signals
     ............................................................................................17
           8.3 AC and DC logic input levels for Differential Signals
     .................................................................................................18
           8.4 Differential Input Cross Point Voltage
     .......................................................................................................................18
           8.5 Slew rate definition for Single Ended Input Signals 
    ...................................................................................................19
         8.5.1 Input Slew Rate for Input Setup Time (tIS) and Data Setup Time (tDS) 
    ...............................................................19
         8.5.2 Input Slew Rate for Input Hold Time (tIH) and Data Hold Time (tDH) 
    ..................................................................19
           8.6 Slew rate definition for Differential Input Signals
     ......................................................................................................19
    9.0 AC and DC Output Measurement Levels.................................................................................................................. 20
           9.1 Single Ended AC and DC Output Levels
     ....................................................................................................................20
           9.2 Differential AC and DC Output Levels
     .......................................................................................................................20
           9.3.Single Ended Output Slew Rate
    ................................................................................................................................ 21
           9.4 Differential Output Slew Rate
     ....................................................................................................................................21
           9.5 Reference Load for AC Timing and Output Slew Rate 
    ................................................................................................22
           9.6 Overshoot/Undershoot Specification
     ........................................................................................................................23
         9.6.1 Address and Control Overshoot and Undershoot specifications
     .......................................................................23
         9.6.2 Clock, Data, Strobe and Mask Overshoot and Undershoot specifications 
    ..........................................................23
           9.7 34 ohm Output Driver DC Electrical Characteristics
     ..................................................................................................24
         9.7.1 Output Drive Temperature and Voltage sensitivity 
    ............................................................................................25
           9.8 On-Die Termination (ODT) Levels and I-V Characteristics
     ..........................................................................................25
                 9.8.1 ODT DC electrical characteristics
     .....................................................................................................................26
                 9.8.2 ODT Temperature and Voltage sensitivity
    ......................................................................................................... 27
           9.9 ODT Timing Definitions
     ............................................................................................................................................ 28
         9.9.1 Test Load for ODT Timings
    ............................................................................................................................... 28
                 9.9.2 ODT Timing Definition
     ......................................................................................................................................28
    10.0 Idd Specification Parameters and Test Conditions ...............................................................................................31
           10.1 IDD Measurement Conditions
     .................................................................................................................................31
           10.2 IDD Specifications
     ..................................................................................................................................................41
    11.0 Input/Output Capacitance ........................................................................................................................................43
    12.0 Electrical Characteristics and AC timing for DDR3-800 to DDR3-1600 ................................................................44
           12.1 Clock specification 
    .................................................................................................................................................44
           12.2 Clock Jitter Specification
     ........................................................................................................................................45
           12.3 Refresh Parameters by Device Density
     ...................................................................................................................46
           12.4 Standard Speed Bins 
    ..............................................................................................................................................46
    13.0 Timing Parameters by Speed Grade ....................................................................................................................... 48
    Table Contents
    
    
    
    
    
    


    


    

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    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
K4B1G0846D
 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb D-die DDR3 SDRAM Specification

    

    
K4B1G0846D-HCF7
 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb D-die DDR3 SDRAM Specification

    

    
K4B1G0846D-HCF8
 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb D-die DDR3 SDRAM Specification

    

    
K4B1G0846D-HCH9
 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb D-die DDR3 SDRAM Specification

    

    
K4B1G0846E
 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Consumer Memory

    

    
    
    
    
	
    	
    
    
     
     
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