參數(shù)資料
型號: JM13903BCA
廠商: Analog Devices, Inc.
英文描述: Internally Trimmed Integrated Circuit Multiplier
中文描述: 內(nèi)部設(shè)置的集成電路乘數(shù)
文件頁數(shù): 4/7頁
文件大?。?/td> 136K
代理商: JM13903BCA
AD532
–4–
REV. B
AD532 PERFORMANCE CHARACTERISTICS
Multiplication accuracy is defined in terms of total error at
+25
°
C with the rated power supply. The value specified is in
percent of full scale and includes X
IN
and Y
IN
nonlinearities,
feedback and scale factor error. To this must be added such
application-dependent error terms as power supply rejection,
common-mode rejection and temperature coefficients (although
worst case error over temperature is specified for the AD532S).
Total expected error is the rms sum of the individual compo-
nents since they are uncorrelated.
Accuracy in the divide mode is only a little more complex. To
achieve division, the multiplier cell must be connected in the
feedback of the output op amp as shown in Figure 13. In this
configuration, the multiplier cell varies the closed loop gain of
the op amp in an inverse relationship to the denominator volt-
age. Thus, as the denominator is reduced, output offset, band-
width and other multiplier cell errors are adversely affected. The
divide error and drift are then
e
m
×
10 V/X
1
– X
2
) where
e
m
represents multiplier full-scale error and drift, and (X
1
–X
2
) is
the absolute value of the denominator.
NONLINEARITY
Nonlinearity is easily measured in percent harmonic distortion.
The curves of Figures 3 and 4 characterize output distortion as
a function of input signal level and frequency respectively, with
one input held at plus or minus 10 V dc. In Figure 4 the sine
wave amplitude is 20 V (p-p).
Figure 3. Percent Distortion vs. Input Signal
Figure 4. Percent Distortion vs. Frequency
AC FEEDTHROUGH
AC feedthrough is a measure of the multiplier’s zero suppres-
sion. With one input at zero, the multiplier output should be
zero regardless of the signal applied to the other input. Feed-
through as a function of frequency for the AD532 is shown in
Figure 5. It is measured for the condition V
X
= 0, V
Y
= 20 V
(p-p) and V
Y
= 0, V
X
= 20 V (p-p) over the given frequency
range. It consists primarily of the second harmonic and is mea-
sured in millivolts peak-to-peak.
Figure 5. Feedthrough vs. Frequency
COMMON-MODE REJECTION
The AD532 features differential X and Y inputs to enhance its
flexibility as a computational multiplier/divider. Common-mode
rejection for both inputs as a function of frequency is shown in
Figure 6. It is measured with X
1
= X
2
= 20 V (p-p), (Y
1
– Y
2
) =
+10 V dc and Y
1
= Y
2
= 20 V (p-p), (X
1
– X
2
) = +10 V dc.
Figure 6. CMRR vs. Frequency
Figure 7. Frequency Response, Multiplying
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