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參數(shù)資料
| 型號(hào)： | JLC1562BNG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16DIP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 無 |
| 頻率 - 時(shí)鐘： | 100kHz |
| 電源電壓： | 4.2 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
| 包括： | DAC，POR |
JLC1562B
http://onsemi.com
6
ACK
S
0
1
1 A2 A1 A0
1
ACK P
D7 D6 D5 D4 D3 D2 D1 D0
ACK
S
0
1
1 A2 A1 A0
0
ACK
P
D7 D6 D5 D4 D3 D2 D1 D0
ACK
D7 D6 D5 D4 D3 D2 D1 D0
<<READ MODE>>
<<WRITE MODE>>
Slave Address
Read Data
I/O Expander Device Address (Pins A0 A2)
1 : READ ADDRESS
A6 A5 A4 A3
0
1
is hard wired as
A0 A2
R/W
A3 A6
Slave Address
Output of Comparator “A”. (Vth = 1/2 VDD)
Output of Comparator “B”. (Vth = 1/2 VDD OR VDAC)
READ LATCH Bit Controls when Data Will Be Latched.
D5 D7
D0 D4
Read Data
Slave Address
Write Data (1)
Write Data (2)
I/O Expander Device Address (Pins A0 A2)
0 : WRITE ADDRESS
A6 A5 A4 A3
0
1
is hard wired as
A0 A2
R/W
A3 A6
Slave Address
Device Pins P0 to P7 Output Bits.
D0 D7
Write Data (1)
READ LATCH CONTROL
D7
Write Data (2)
Latch Control of Signals C0 C4
in the Device BLOCK DIAGRAM
COMPARATOR “B” Vref Control Bit
D6
0 : Data is latched at the ACK after a READ COMMAND.
1 : Data is latched when Comparator “B” switches from 0 to 1.
(switch point is controlled by Vth.)
1 : Data is reset at the ACK after a READ COMMAND.
DAC Input Bits
D0 D5
0: V
ref +
40
80
V
DD
1: V
ref +
V
DAC
READ WRITE DATA FORMAT
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