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參數(shù)資料
| 型號： | IW4027B |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Dual JK Flip-Flop |
| 中文描述： | 雙JK觸發(fā)器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 48K |
| 代理商： | IW4027B |
TECHNICAL DATA
1
INTEGRAL
Dual JK Flip-Flop
The IW4027B is a Dual JK Flip-Flop which is edge-triggered and
features independent Set, Reset, and Clock inputs. Data is accepted
when the Clock is LOW and transferred to the output on the positive-
going edge of the Clock. The active HIGH asynchronous Reset and Set
are independent and override the J, K, or Clock inputs. The outputs are
buffered for best system performance.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
μ
A at 18 V over full package-
temperature range; 100 nA at 18 V and 25
°
C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4027B
ORDERING INFORMATION
IW4027BN Plastic
IW4027BD SOIC
IZ4027B Chip
T
A
= -55
°
to 125
°
C for all packages
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Outputs
Set Reset Clock
J
Q
n+1
Q
n+1
L
H
X
X
X
L
H
H
L
X
X
X
H
L
H
H
X
X
X
H
H
L
L
L
L
No change
L
L
H
L
H
L
L
L
L
H
L
H
L
L
H
H
Qn
Qn
X = don’t care
Qn+1 = State After Clock Positive Transition
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IW4027BD | Dual JK Flip-Flop |
| IW4027BN | Dual JK Flip-Flop |
| IW4028 | BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
| IW4028B | BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
| IW4028BD | BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IW4027BD | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Dual JK Flip-Flop |
| IW4027BN | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Dual JK Flip-Flop |
| IW4028 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
| IW4028B | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
| IW4028BD | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
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