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參數(shù)資料
| 型號(hào)： | ISPLSI2032VE-225LT48 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | 3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| 中文描述： | EE PLD, 6 ns, PQFP48 |
| 封裝： | 7 X 7 MM, 0.50 MM PITCH, TQFP-48 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | ISPLSI2032VE-225LT48 |
Specifications
ispLSI 2032VL
7
ispLSI 2032VL Timing Model
GLB Reg
Delay
I/O Pin
(Output)
ORP
Delay
Feedback
Reg 4 PT Bypass
#24
20 PT
XOR Delays
Control
PTs
#335
I/O Pin
(Input)
Y0,1,2
GRP
#22
GLB Reg Bypass
#28
ORP Bypass
#37
D
Q
RST
RE
OE
CK
I/O Delay
#20
I/O Cell
ORP
GLB
GRP
I/O Cell
#25, 26, 27
#43, 44
#36
Reset
Ded. In
#21
#31, 32
#38,
39
GOE 0
#42
#40, 41
0491/2032VL
Comb 4 PT Bypass #23
#45
Derivations of
t
su,
t
h and
t
co from the Product Term Clock
=
=
=
=
3.5ns
(0.5 + 0.6 + 2.9) + (1.7) - (0.5 + 0.6 + 1.1)
=
=
=
=
(0.5 + 0.6 + 4.1) + (1.3) - (0.5 + 0.6 + 2.9)
=
=
=
=
(0.5 + 0.6 + 4.1) + (0.3) + (1.7 + 1.8)
t
su
2.5ns
9.0ns
Logic + Reg su - Clock (min)
(
t
io +
t
grp +
t
20ptxor) + (
t
gsu) - (
t
io +
t
grp +
t
ptck(min))
(#20 + #22 + #26) + (#29) - (#20 + #22 + #35)
t
h
Clock (max) + Reg h - Logic
(
t
io +
t
grp +
t
ptck(max)) + (
t
gh) - (
t
io +
t
grp +
t
20ptxor)
(#20 + #22 + #35) + (#30) - (#20 + #22 + #26)
t
co
Clock (max) + Reg co + Output
(
t
io +
t
grp +
t
ptck(max)) + (
t
gco) + (
t
orp +
t
ob)
(#20 + #22 + #35) + (#31) + (#36 + #38)
Table 2-0042/2032VL
Note: Calculations are based on timing specifications for the ispLSI 2032VL-180L.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPLSI2032VE-110LB49 | Solid-State Panel Mount Relay; Contacts:SPST-NO; Output Device:SCR; Output Voltage Max:140Vrms; Output Voltage Min:24Vrms; Control Voltage Max:280Vrms; Control Voltage Min:90Vrms; Load Current Max:10A; Switching:Zero Cross RoHS Compliant: Yes |
| ISPLSI2032VE-110LJ44 | IC,Normally-Closed Panel-Mount Solid-State Relay,1-CHANNEL,M:HL048HD4.4 |
| ISPLSI2032VE-110LT44 | 3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VE-110LT48 | 3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VL-110LB49 | 2.5V In-System Programmable SuperFAST⑩ High Density PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI2032VE225LT48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VE225LTN44 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VE225LTN44I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VE225LTN48 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| ISPLSI2032VE225LTN48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable High Density SuperFAST⑩ PLD |
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