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參數(shù)資料
| 型號： | ISPLSI1032-80LJ |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | In-System Programmable High Density PLD |
| 中文描述： | EE PLD, 20 ns, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 226K |
| 代理商： | ISPLSI1032-80LJ |
Specifications
ispLSI 1032
3
Absolute Maximum Ratings
1
Supply Voltage V
cc
.................................. -0.5 to +7.0V
Input Voltage Applied........................-2.5 to V
CC
+1.0V
Off-State Output Voltage Applied .....-2.5 to V
CC
+1.0V
Storage Temperature................................ -65 to 150
°
C
Case Temp. with Power Applied .............. -55 to 125
°
C
Max. Junction Temp. (T
J
) with Power Applied ... 150
°
C
1. Stresses above those listed under the
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
V
V
PARAMETER
SYMBOL
MIN.
MAX.
UNITS
5.25
5.5
5.5
0.8
V
cc + 1
Supply Voltage
V
CC
V
IL
V
IH
Table 2- 0005Aisp w/mil.eps
4.75
4.5
4.5
0
2.0
Commercial T
A
=
0
°
C to +70
°
C
T
A
= -40
°
C to +85
°
C
Military/883
T
C
= -55
°
C to +125
°
C
Input Low Voltage
Input High Voltage
V
Capacitance (T
A
=25
o
C, f=1.0 MHz)
SYMBOL
C
1
PARAMETER
MAXIMUM
1
UNITS
TEST CONDITIONS
Commercial/Industrial
Dedicated Input Capacitance
8
pf
V
CC
=5.0V, V
IN
=2.0V
Military
10
pf
V
CC
=5.0V, V
IN
=2.0V
V
CC
=5.0V, V
I/O
, V
Y
=2.0V
C
2
1
.
Guaranteed but not 100% tested.
I/O and Clock Capacitance
10
pf
Table 2- 0006
Data Retention Specifications
Table 2- 0008B
PARAMETER
Data Retention
Erase/Reprogram Cycles
MINIMUM
20
10000
MAXIMUM
—
—
UNITS
Years
Cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPLSI1032-80LT | In-System Programmable High Density PLD |
| ISPLSI1032-90LJ | In-System Programmable High Density PLD |
| ISPLSI1032-90LT | In-System Programmable High Density PLD |
| ISPLSI1032E-100LJ | In-System Programmable High Density PLD |
| ISPLSI1032E-80LJ | In-System Programmable High Density PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI1032-80LJ/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1032-80LJI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ispLSI1032-80LT | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI1032-80LT/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1032-80LTI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
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