參數(shù)資料
型號: ISPLSI1016EA-125LT44
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: In-System Programmable High Density PLD
中文描述: EE PLD, 10 ns, PQFP44
封裝: TQFP-44
文件頁數(shù): 10/13頁
文件大?。?/td> 162K
代理商: ISPLSI1016EA-125LT44
10
Specifications
ispLSI 1016EA
Power Consumption
Power consumption in the ispLSI 1016EA device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
used. Figure 4 shows the relationship between power
and operating speed.
90
80
120
0
50
100
f
max (MHz)
150
200
250
I
C
Notes: Configuration of four 16-bit counters
Typical current at 5V, 25
°
C
ispLSI 1016EA
110
0127/1016EA
ICC can be estimated for the ispLSI 1016EA using the following equation:
ICC(mA) = 23 + (# of PTs * 0.52) + (# of nets * max freq * 0.004)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of four GLB loads
on average exists and the device is filled with four 16-bit counters. These values are for estimates only. Since the
value of ICC is sensitive to operating conditions and the program in the device, the actual ICC should be verified.
130
140
150
100
Figure 4. Typical Device Power Consumption vs fmax
Maximum GRP Delay vs GLB Loads
GLB Load
ispLSI 1016EA-200
ispLSI 1016EA-125
ispLSI 1016EA-100
3
4
1
8
16
G
4
2
GRP/GLB/1016EA
1
相關(guān)PDF資料
PDF描述
ISPLSI1016EA-200LJ44 In-System Programmable High Density PLD
ISPLSI1016EA-200LT44 In-System Programmable High Density PLD
ispLSI1016 In-System Programmable High Density PLD
ISPLSI1016E In-System Programmable High Density PLD
ISPLSI1016E-125LJ In-System Programmable High Density PLD
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