Specifications ispLSI 5512VE 22 Signal Configuration ispLSI 5512VE 272-Ball BGA (1.27mm Ball Pitch / 27.0mm x 27.0mm Body Size) 20 19 18 17 16 " />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISPLSI 5512VE-100LB272
寤犲晢锛� Lattice Semiconductor Corporation
鏂囦欢闋佹暩(sh霉)锛� 15/25闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC PLD ISP 256I/O 10NS 272BGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 40
绯诲垪锛� ispLSI® 5000VE
鍙法绋嬮鍨嬶細 绯荤当(t菕ng)鍏�(n猫i)鍙法绋�
鏈€澶у欢閬叉檪闁� tpd(1)锛� 10.0ns
闆诲闆绘簮 - 鍏�(n猫i)閮細 3 V ~ 3.6 V
閭忚集鍏冧欢/閭忚集濉婃暩(sh霉)鐩細 16
瀹忓柈鍏冩暩(sh霉)锛� 512
闁€鏁�(sh霉)锛� 24000
杓稿叆/杓稿嚭鏁�(sh霉)锛� 192
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 272-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 272-BGA锛�27x27锛�
鍖呰锛� 鎵樼洡
鍏跺畠鍚嶇ū锛� ISPLSI5512VE-100LB272
Specifications ispLSI 5512VE
22
Signal Configuration
ispLSI 5512VE 272-Ball BGA (1.27mm Ball Pitch / 27.0mm x 27.0mm Body Size)
20
19
18
17
16
15
14
13
12
11
10
987654321
A
B
C
D
GND
NC1
I/O
170
NC1
I/O
18
NC1
GND
VCC
GOE1
GOE0
NC1
VCC
NC1
GND
CLK1
VCC
TMS
TCK
TDI
VCC
CLK0
NC1
GND
TDO VCCIO RESET
GND GND GND
GND GND GND GND
GND
VCC
GND GND GND
GND GND GND GND
D
E
F
ispLSI 5512VE
F
G
Bottom View
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
20
19
18
17
16
15
14
13
12
11
10
987654321
1. NCs are not to be connected to any active signals, Vcc or GND.
Note: Ball A1 indicator dot on top side of package.
I/O
164
I/O
165
I/O
169
I/O
166
I/O
162
I/O
134
I/O
130
I/O
127
I/O
172
I/O
176
I/O
179
I/O
178
I/O
174
I/O
190
I/O
191
I/O
90
I/O
89
I/O
91
I/O
187
I/O
189
I/O
188
I/O
94
I/O
95
I/O
93
I/O
92
I/O
185
I/O
186
I/O
184
I/O
183
I/O
96
I/O
181
I/O
182
I/O
180
I/O
98
I/O
99
I/O
97
I/O
177
I/O
106
I/O
101
I/O
103
I/O
100
I/O
175
I/O
173
I/O
171
I/O
168
I/O
104
I/O
107
I/O
102
I/O
108
I/O
110
I/O
112
I/O
105
I/O
167
I/O
155
I/O
145
I/O
133
I/O
124
I/O
118
I/O
113
I/O
109
I/O
161
I/O
156
I/O
152
I/O
148
I/O
144
I/O
138
I/O
123
I/O
120
I/O
117
I/O
111
I/O
163
I/O
159
I/O
157
I/O
153
I/O
150
I/O
147
I/O
143
I/O
137
I/O
141
I/O
135
I/O
128
I/O
125
I/O
121
I/O
116
I/O
160
I/O
158
I/O
154
I/O
146
I/O
142
I/O
151
I/O
149
I/O
140
I/O
139
I/O
136
I/O
132
I/O
129
I/O
126
I/O
122
I/O
115
I/O
114
I/O 119/
CLK2
I/O 131/
CLK3
I/O 0/
TOE
I/O
1
I/O
2
I/O
6
I/O
7
I/O
8
I/O
10
I/O
11
I/O
16
I/O
22
I/O
26
I/O
23
I/O
30
I/O
33
I/O
36
I/O
40
I/O
44
I/O
43
I/O
49
I/O
52
I/O
54
I/O
57
I/O
61
I/O
67
I/O
63
I/O
25
I/O
19
I/O
29
I/O
32
I/O
41
I/O
39
I/O
35
I/O
45
I/O
46
I/O
50
I/O
53
I/O
56
I/O
60
I/O
66
I/O
17
I/O
20
I/O
24
I/O
34
I/O
31
I/O
27
I/O
15
I/O
38
I/O
42
I/O
62
I/O
59
I/O
55
I/O
51
I/O
47
I/O
65
I/O
69
I/O
68
I/O
72
I/O
13
I/O
14
I/O
21
I/O
37
I/O
48
I/O
58
I/O
70
I/O
71
I/O
73
I/O
64
I/O
28
I/O
74
I/O
75
I/O
76
I/O
78
I/O
79
I/O
9
I/O
12
I/O
77
I/O
80
I/O
81
I/O
4
I/O
3
I/O
5
I/O
82
I/O
84
I/O
83
I/O
85
I/O
86
I/O
88
I/O
87
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ISPLSI5512VE-100LB272 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜椤炲瀷:EEPROM 澶ч浕姹犳暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅傞枔:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100
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