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參數(shù)資料
| 型號： | ISPLSI 2064VE-280LTN44 |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD ISP 64I/O 3.5NS 44TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | ispLSI® 2000VE |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 3.5ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 邏輯元件/邏輯塊數(shù)目： | 16 |
| 宏單元數(shù)： | 64 |
| 門數(shù)： | 2000 |
| 輸入/輸出數(shù)： | 32 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
| 其它名稱： | ISPLSI2064VE-280LTN44 |
11
Specifications ispLSI 2064VE
32-I/O Signal Descriptions
GOE 0/IN 3
This pin performs one of two functions. It can be programmed to function as a Global Output Enable
pin or a Dedicated Input pin.
GOE 1/Y0
This pin performs one of two functions. (1) It can be programmed to function as a GLobal Output Enable
or a Dedicated Clock input. (2) This clock input is connected to one of the clock inputs of all GLBs on
the device.
RESET/Y1
This pin performs two functions: (1) Active Low (0) Reset pin which resets all of the registers in the
device. (2) When active low (0), it functions as a dedicated clock input.
BSCAN
Input – Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
TDI/IN 0
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a serial data input
pin to load programming data into the device. (2) When BSCAN is high, it functions as a dedicated input
pin.
TMS/IN 2
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a mode control pin
for the Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TDO/IN 1
Output/Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as an output
pin to read serial shift register data. (2) When
BSCAN is high, it functions as a dedicated input pin.
TCK/Y2
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated clock input.
GND
Ground (GND)
VCC
Vcc
NC1
No Connect
I/O
Input/Output pins – These are the general purpose I/O pins used by the logic array.
64-I/O Signal Descriptions
RESET
Active Low (0) Reset pin resets all the registers in the device.
GOE 0, GOE1
Global Output Enable input pins.
Y0, Y1, Y2
Dedicated Clock Input – These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
BSCAN
Input – Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
TDI/IN 0
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a serial data input
pin to load programming data into the device. When BSCAN is high, it functions as a dedicated input pin.
TCK/IN 3
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TMS/IN 1
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a mode control pin
for the Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TDO/IN 2
Output/Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as an output
pin to read serial shift register data. (2) When
BSCAN is high, it functions as a dedicated input pin.
GND
Ground (GND)
VCC
Vcc
NC1
No Connect
I/O
Input/Output Pins – These are the general purpose I/O pins used by the logic array.
Signal Name
Description
1. NC pins are not to be connected to any active signals, VCC or GND.
Signal Name
Description
1. NC pins are not to be connected to any active signals, VCC or GND.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI2064VE-280LTN44 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ispLSI2064VL-100LB100 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000B RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ispLSI2064VL-100LJ44 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000B RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI2064VL-100LT100 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPLSI-2064VL-100LT44 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Lattice Semiconductor Corporation 功能描述: |
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