Specifications ispLSI 2064E Power Consumption Power consumption in the ispLSI 2064E device depends on two primary factors: the speed at which" />
參數(shù)資料
型號: ISPLSI 2064E-100LT100
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 10/11頁
文件大小: 0K
描述: IC PLD ISP 64I/O 10NS 100TQFP
標準包裝: 90
系列: ispLSI® 2000E
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 10.0ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 64
門數(shù): 2000
輸入/輸出數(shù): 64
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
其它名稱: ISPLSI2064E-100LT100
8
Specifications ispLSI 2064E
Power Consumption
Power consumption in the ispLSI 2064E device depends
on two primary factors: the speed at which the device is
operating and the number of Product Terms used.
Figure 3 shows the relationship between power and
operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127A/2064E
ICC can be estimated for the ispLSI 2064E using the following equation:
ICC(mA) = 7 + (# of PTs * 0.75) + (# of nets * Max freq * 0.004)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of two GLB loads on
average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions and the
program in the device, the actual ICC should be verified.
80
100
120
1
20
40
60
80
100 120 140
160 180 200
fmax (MHz)
ICC
(mA)
Notes: Configuration of Four 16-bit Counters
Typical Current at 5V, 25° C
ispLSI 2064E
110
90
70
130
140
150
160
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ISPLSI2064E-200LT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
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