參數(shù)資料
型號: ISL97650ARTZ-T
廠商: INTERSIL CORP
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 4-Channel Integrated LCD Supply
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, PQCC36
封裝: 6 X 6 MM, ROHS COMPLIANT, PLASTIC, MO-220WJJD-1, TMLFP-36
文件頁數(shù): 16/20頁
文件大?。?/td> 333K
代理商: ISL97650ARTZ-T
16
FN9198.3
November 28, 2006
The maximum V
OFF
output voltage of a single stage charge pump is:
R6 and R7 in the Typical Application Diagram determine
V
OFF
output voltage.
Improving Charge Pump Noise Immunity
Depending on PCB layout and environment, noise pick-up at
the FBP and FBN inputs, which may degrade load regulation
performance, can be reduced by the inclusion of capacitors
across the feedback resistors (e.g. in the Application
Diagram, C21 and C22 for the positive charge pump). Set
R6 C20 = R7 C19 with C19 ~ 100pF.
V
ON
Slice Circuit
The V
ON
Slice Circuit functions as a three way multiplexer,
switching the voltage on COM between ground, DRN and SRC,
under control of the start-up sequence and the CTL pin.
During the start-up sequence, COM is held at ground via an
NDMOS FET, with ~1k impedance. Once the start-up
sequence has completed, CTL is enabled and acts as a
multiplexer control such that if CTL is low, COM connects to
DRN through a 30
Ω
internal MOSFET, and if CTL is high,
COM connects to P
OUT
internally via a 5
Ω
MOSFET.
The slew rate of start-up of the switch control circuit is mainly
restricted by the load capacitance at COM pin as following
equation:
V
i
Where V
g
is the supply voltage applied to DRN or voltage at
P
OUT
, which range is from 0V to 36V. R
i
is the resistance
between COM and DRN or P
OUT
including the internal
MOSFET r
DS(On)
, the trace resistance and the resistor
inserted, R
L
is the load resistance of switch control circuit,
and C
L
is the load capacitance of switch control circuit.
In the Typical Application Circuit, R10, R11 and C15 give the
bias to DRN based on the following equation:
And R12 can be adjusted to adjust the slew rate.
FIGURE 17. NEGATIVE CHARGE PUMP BLOCK DIAGRAM
FAULT
0.2V
CLK
EN
VDD
VSUP
FBN
NOUT
PGND
STOP
PWM
CONTROL
V
REF
R6
40k
C20
820pF
C19
100pF
R7
328k
V
OFF
(-8V)
C13
470nF
D2
D3
C12
220nF
A2
0.4V
A1
M1
M2
1.2MHz
V
OFF_MAX
2x
(
)
V
SUP
V
DIODE
2
I
OUT
R
ON
NOUT
(
)
H
R
ON
NOUT
(
)
L
+
(
)
+
+
=
(EQ. 20)
V
OFF
V
FBN
1
-------
+
V
REF
-------
=
(EQ. 21)
V
Δ
t
-------
L
L
------------------------------------
=
(EQ. 22)
V
DRN
V
R
+AVDD R
10
11
+
--------------------------------------------------------------
=
(EQ. 23)
ISL97650
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